[PATCH u-boot-marvell v2 6/6] arm: a37xx: pci: Update private structure documentation
Stefan Roese
sr at denx.de
Fri Oct 8 08:22:15 CEST 2021
On 26.09.21 00:54, Marek Behún wrote:
> From: Marek Behún <marek.behun at nic.cz>
>
> There were several changes for this structure but the documentation was
> not changed at the time. Fix this.
>
> Signed-off-by: Marek Behún <marek.behun at nic.cz>
Reviewed-by: Stefan Roese <sr at denx.de>
Thanks,
Stefan
> ---
> drivers/pci/pci-aardvark.c | 17 +++++++++--------
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c
> index b4f350ca2c..414872ed35 100644
> --- a/drivers/pci/pci-aardvark.c
> +++ b/drivers/pci/pci-aardvark.c
> @@ -186,14 +186,15 @@
> /**
> * struct pcie_advk - Advk PCIe controller state
> *
> - * @reg_base: The base address of the register space.
> - * @first_busno: This driver supports multiple PCIe controllers.
> - * first_busno stores the bus number of the PCIe root-port
> - * number which may vary depending on the PCIe setup
> - * (PEX switches etc).
> - * @sec_busno: sec_busno stores the bus number for the device behind
> - * the PCIe root-port
> - * @device: The pointer to PCI uclass device.
> + * @base: The base address of the register space.
> + * @first_busno: Bus number of the PCIe root-port.
> + * This may vary depending on the PCIe setup.
> + * @sec_busno: Bus number for the device behind the PCIe root-port.
> + * @dev: The pointer to PCI uclass device.
> + * @reset_gpio: GPIO descriptor for PERST.
> + * @cfgcache: Buffer for emulation of PCIe Root Port's PCI Bridge registers
> + * that are not available on Aardvark.
> + * @cfgcrssve: For CRSSVE emulation.
> */
> struct pcie_advk {
> void *base;
>
Viele Grüße,
Stefan
--
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