[PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE

Stefan Roese sr at denx.de
Wed Sep 1 16:32:55 CEST 2021


On 01.09.21 13:29, Tom Rini wrote:
> On Wed, Sep 01, 2021 at 07:27:54AM +0200, Stefan Roese wrote:
>> Hi Tom,
>>
>> On 31.08.21 14:43, Tom Rini wrote:
>>> On Tue, Aug 31, 2021 at 07:51:29AM +0200, Stefan Roese wrote:
>>>> Hi Tom,
>>>>
>>>> On 21.08.21 19:50, Tom Rini wrote:
>>>>> We have a number of CONFIG symbols to express the fixed size of system
>>>>> memory.  For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
>>>>> and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
>>>>> size rather than MiB.
>>>>>
>>>>> Cc: Marek Behún <marek.behun at nic.cz>
>>>>> Cc: Stefan Roese <sr at denx.de>
>>>>> Signed-off-by: Tom Rini <trini at konsulko.com>
>>>>> ---
>>>>>     drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++--
>>>>>     include/configs/maxbcm.h           | 4 +++-
>>>>>     include/configs/theadorable.h      | 4 +++-
>>>>>     3 files changed, 8 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
>>>>> index 270691e9bcd3..970651f87029 100644
>>>>> --- a/drivers/ddr/marvell/axp/ddr3_axp.h
>>>>> +++ b/drivers/ddr/marvell/axp/ddr3_axp.h
>>>>> @@ -19,10 +19,10 @@
>>>>>     #define FAR_END_DIMM_ADDR		0x50
>>>>>     #define MAX_DIMM_ADDR			0x60
>>>>> -#ifndef CONFIG_DDR_FIXED_SIZE
>>>>> +#ifndef CONFIG_SYS_SDRAM_SIZE
>>>>>     #define SDRAM_CS_SIZE			0xFFFFFFF
>>>>>     #else
>>>>> -#define SDRAM_CS_SIZE			(CONFIG_DDR_FIXED_SIZE - 1)
>>>>> +#define SDRAM_CS_SIZE			((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
>>>>
>>>> Why are you using ">> 10" (dividing by 1024) here?
>>>>
>>>> Thanks,
>>>> Stefan
>>>>
>>>>>     #endif
>>>>>     #define SDRAM_CS_BASE			0x0
>>>>>     #define SDRAM_DIMM_SIZE			0x80000000
>>>>> diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
>>>>> index fc2393204bec..5098f12f5425 100644
>>>>> --- a/include/configs/maxbcm.h
>>>>> +++ b/include/configs/maxbcm.h
>>>>> @@ -6,6 +6,8 @@
>>>>>     #ifndef _CONFIG_DB_MV7846MP_GP_H
>>>>>     #define _CONFIG_DB_MV7846MP_GP_H
>>>>> +#include <linux/sizes.h>
>>>>> +
>>>>>     /*
>>>>>      * High Level Configuration Options (easy to change)
>>>>>      */
>>>>> @@ -65,7 +67,7 @@
>>>>>     /* SPL related SPI defines */
>>>>>     /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
>>>>> -#define CONFIG_DDR_FIXED_SIZE		(1 << 20)	/* 1GiB */
>>>>> +#define CONFIG_SYS_SDRAM_SIZE		SZ_1G
>>>
>>> OK, so before my change, SDRAM_CS_SIZE = 0xfffff.  After my change,
>>> SDRAM_CS_SIZE = 0xfffff, still.
>>>
>>>>>     #define CONFIG_BOARD_ECC_SUPPORT	/* this board supports ECC */
>>>>>     #endif /* _CONFIG_DB_MV7846MP_GP_H */
>>>>> diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
>>>>> index 760713d3ef87..abc48ff44ca5 100644
>>>>> --- a/include/configs/theadorable.h
>>>>> +++ b/include/configs/theadorable.h
>>>>> @@ -6,6 +6,8 @@
>>>>>     #ifndef _CONFIG_THEADORABLE_H
>>>>>     #define _CONFIG_THEADORABLE_H
>>>>> +#include <linux/sizes.h>
>>>>> +
>>>>>     /*
>>>>>      * High Level Configuration Options (easy to change)
>>>>>      */
>>>>> @@ -93,6 +95,6 @@
>>>>>     #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
>>>>>     /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
>>>>> -#define CONFIG_DDR_FIXED_SIZE		(2 << 20)	/* 2GiB */
>>>>> +#define CONFIG_SYS_SDRAM_SIZE		SZ_2G
>>>
>>> Here, before SDRAM_CS_SIZE = 0x1fffff and then after SDRAM_CS_SIZE =
>>> 0x1fffff.
>>>
>>> This is because CONFIG_DDR_FIXED_SIZE is kilobytes and
>>> CONFIG_SYS_SDRAM_SIZE is bytes, yes?  Thanks.
>>
>> Only if CONFIG_DDR_FIXED_SIZE / CONFIG_SYS_SDRAM_SIZE is undefined.
>>
>> Please see e.g. theadorable.h above. Here we have:
>>
>> #define CONFIG_DDR_FIXED_SIZE		(2 << 20)	/* 2GiB */
>>
>> With this, the following will happen in ddr3_axp.h:
>>
>> #ifndef CONFIG_DDR_FIXED_SIZE
>> #define SDRAM_CS_SIZE			0xFFFFFFF
>> #else
>> #define SDRAM_CS_SIZE			(CONFIG_DDR_FIXED_SIZE - 1)
>> #endif
>>
>> So SDRAM_CS_SIZE will be set to "(2 << 20) - 1".
>>
>> AFAICT, on Armada XP CONFIG_DDR_FIXED_SIZE is bytes and not
>> kilobytes.
> 
> I'm not follow, sorry.  There's exactly two defines of
> CONFIG_DDR_FIXED_SIZE before this patch, neither platform also set
> CONFIG_SYS_SDRAM_SIZE, and they're converted to CONFIG_SYS_SDRAM_SIZE
> now.  I did the evaluations to confirm the code is unchanged.

Ah, now I see my misunderstanding. "2 << 20" is of course 2MiB and
not 2GiB. I was mislead by the comment in the header.

But now I'm thinking that SDRAM_CS_SIZE might need to be set to the
CS size in bytes and *not* in kilobytes for Armada XP. But this is a
different issue which I need to investigate and perhaps follow up on.

Thanks,
Stefan


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