[PATCH v2 8/9] arm: dts: ls1028a: sync the fsl-ls1028a.dtsi with linux

[Michael Walle]

Am 2021-09-01 23:59, schrieb Vladimir Oltean:
>> 
>> > As for pcie->lut itself, simplest would be to just default to what is
>> > now the "dbi" reg value, plus a .lut_offset determined by compatible
>> > string, in the case of "fsl,ls1028a-pcie" 0x80000, just like Linux.
>> >
>> > Ah, and not to mention that the reg-names are not even the same between
>> > U-Boot and Linux. What is "dbi" in U-Boot is "regs" in Linux :)
>> 
>> Well and there is a big-endian property, which of course is set for 
>> any
>> Layerscape but the LS1028A. linux has instead just one endianess, but
>> use a shift offset.
> 
> You lost me here. How are registers accessed with the right endianness
> in Linux and in U-Boot?

Of all the ctrl registers, Linux seems to just use the lut_dbg register
for link state detection (via the .lut_dbg offset). It uses the 
.ltssm_shift
property to shift the read value of this register. That property is
either 0 or 24, which I suspect is the same as converting the endianess
(ie. in u-boot).

-michael