[PATCH 1/2] sunxi: Simplify MMC pinmux selection
Andre Przywara
andre.przywara at arm.com
Thu Sep 16 12:42:51 CEST 2021
On 12/09/2021 16:28, Samuel Holland wrote:
> Only one board, Yones Toptech BD1078, actually uses a non-default MMC
> pinmux. All other uses of these symbols select the default value or an
> invalid value. To simplify things, remove support for the unused pinmux
> options, and convert the remaining option to a Boolean.
>
> This allows the pinmux to be chosen by the preprocessor, instead of
> having the code parse a string at runtime (for a build-time option!).
> Not only does this reduce code size, but it also allows this Kconfig
> option to be used in a table-driven DM pinctrl driver.
That's a very nice cleanup, and I like the diffstat, so thanks very much.
Actually it made me wonder if we can't go a step further, and replace
all the #ifdef's with if (IS_ENABLED()). So I gave this a try and it
seems to work - see below. I will double check that they are equivalent,
but would be interested what you think and if that somehow clashes with
your future plans.
But we should take this patch as a step here anyway. I checked that the
transformations are correct, so:
> Signed-off-by: Samuel Holland <samuel at sholland.org>
Reviewed-by: Andre Przywara <andre.przywara at arm.com>
(on top of your patch)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index f98d370342..45d40d7847 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -411,166 +411,123 @@ void board_nand_init(void)
#ifdef CONFIG_MMC
static void mmc_pinmux_setup(int sdc)
{
- unsigned int pin;
+ unsigned int pin, start_pin = ~0, mux = ~0, num_pins = 6;
switch (sdc) {
- case 0:
- /* SDC0: PF0-PF5 */
- for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPF_SDC0);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
+ case 0: /* SDC0: PF0-PF5 */
+ start_pin = SUNXI_GPF(0);
+ mux = SUNXI_GPF_SDC0;
break;
case 1:
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_R40)
- if (IS_ENABLED(CONFIG_MMC1_PINS_PH)) {
- /* SDC1: PH22-PH-27 */
- for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN4I_GPH_SDC1);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
+ if (IS_ENABLED(CONFIG_MACH_SUN4I) ||
+ IS_ENABLED(CONFIG_MACH_SUN7I) ||
+ IS_ENABLED(CONFIG_MACH_SUN8I_R40)) {
+ if (IS_ENABLED(CONFIG_MMC1_PINS_PH)) {
+ start_pin = SUNXI_GPH(22);
+ mux = SUN4I_GPH_SDC1;
+ } else {
+ start_pin = SUNXI_GPG(0);
+ mux = SUN4I_GPG_SDC1;
}
- } else {
- /* SDC1: PG0-PG5 */
- for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN4I_GPG_SDC1);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
- }
-#elif defined(CONFIG_MACH_SUN5I)
- /* SDC1: PG3-PG8 */
- for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN5I_GPG_SDC1);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
-#elif defined(CONFIG_MACH_SUN6I)
- /* SDC1: PG0-PG5 */
- for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPG_SDC1);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
+ } else if (IS_ENABLED(CONFIG_MACH_SUN5I)) {
+ start_pin = SUNXI_GPG(3);
+ mux = SUN5I_GPG_SDC1;
+ } else if (IS_ENABLED(CONFIG_MACH_SUN6I)) {
+ start_pin = SUNXI_GPG(0);
+ mux = SUN6I_GPG_SDC1;
+ } else if (IS_ENABLED(CONFIG_MACH_SUN8I)) {
+ start_pin = SUNXI_GPG(0);
+ mux = SUN8I_GPG_SDC1;
}
-#elif defined(CONFIG_MACH_SUN8I)
- /* SDC1: PG0-PG5 */
- for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN8I_GPG_SDC1);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
-#endif
break;
case 2:
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
- /* SDC2: PC6-PC11 */
- for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
-#elif defined(CONFIG_MACH_SUN5I)
- /* SDC2: PC6-PC15 */
- for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
-#elif defined(CONFIG_MACH_SUN6I)
- /* SDC2: PC6-PC15, PC24 */
- for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
-
- sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
-#elif defined(CONFIG_MACH_SUN8I_R40)
- /* SDC2: PC6-PC15, PC24 */
- for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
-
- sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
-#elif defined(CONFIG_MACH_SUN8I) || defined(CONFIG_MACH_SUN50I)
- /* SDC2: PC5-PC6, PC8-PC16 */
- for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
-
- for (pin = SUNXI_GPC(8); pin <= SUNXI_GPC(16); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
-#elif defined(CONFIG_MACH_SUN50I_H6)
- /* SDC2: PC4-PC14 */
- for (pin = SUNXI_GPC(4); pin <= SUNXI_GPC(14); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
-#elif defined(CONFIG_MACH_SUN50I_H616)
- /* SDC2: PC0-PC1, PC5-PC6, PC8-PC11, PC13-PC16 */
- for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(16); pin++) {
- if (pin > SUNXI_GPC(1) && pin < SUNXI_GPC(5))
- continue;
- if (pin == SUNXI_GPC(7) || pin == SUNXI_GPC(12))
- continue;
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 3);
- }
-#elif defined(CONFIG_MACH_SUN9I)
- /* SDC2: PC6-PC16 */
- for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(16); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
+ if (IS_ENABLED(CONFIG_MACH_SUN4I) ||
+ IS_ENABLED(CONFIG_MACH_SUN7I)) {
+ start_pin = SUNXI_GPC(6);
+ mux = SUNXI_GPC_SDC2;
+ } else if (IS_ENABLED(CONFIG_MACH_SUN5I)) {
+ start_pin = SUNXI_GPC(6);
+ mux = SUNXI_GPC_SDC2;
+ num_pins = 10;
+ } else if (IS_ENABLED(CONFIG_MACH_SUN6I)) {
+ start_pin = SUNXI_GPC(6);
+ mux = SUNXI_GPC_SDC2;
+ num_pins = 10;
+ sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);
+ sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
+ } else if (IS_ENABLED(CONFIG_MACH_SUN8I_R40)) {
+ start_pin = SUNXI_GPC(6);
+ mux = SUNXI_GPC_SDC2;
+ num_pins = 10;
+ sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);
+ sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
+ } else if (IS_ENABLED(CONFIG_MACH_SUN8I) ||
+ IS_ENABLED(CONFIG_MACH_SUN50I)) {
+ start_pin = SUNXI_GPC(8);
+ mux = SUNXI_GPC_SDC2;
+ num_pins = 9;
+ for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) {
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
+ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(pin, 2);
+ }
+ } else if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) {
+ start_pin = SUNXI_GPC(4);
+ mux = SUNXI_GPC_SDC2;
+ num_pins = 11;
+ } else if (IS_ENABLED(CONFIG_MACH_SUN50I_H616)) {
+ /* SDC2: PC0-PC1, PC5-PC6, PC8-PC11, PC13-PC16 */
+ for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(16); pin++) {
+ if (pin > SUNXI_GPC(1) && pin < SUNXI_GPC(5))
+ continue;
+ if (pin == SUNXI_GPC(7) || pin == SUNXI_GPC(12))
+ continue;
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
+ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(pin, 3);
+ }
+ return;
+ } else if (IS_ENABLED(CONFIG_MACH_SUN9I)) {
+ start_pin = SUNXI_GPC(6);
+ mux = SUNXI_GPC_SDC2;
+ num_pins = 11;
}
-#else
- puts("ERROR: No pinmux setup defined for MMC2!\n");
-#endif
break;
case 3:
-#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_R40)
- /* SDC3: PI4-PI9 */
- for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPI_SDC3);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
- }
-#elif defined(CONFIG_MACH_SUN6I)
- /* SDC3: PC6-PC15, PC24 */
- for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
- sunxi_gpio_set_cfgpin(pin, SUN6I_GPC_SDC3);
- sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(pin, 2);
+ if (IS_ENABLED(CONFIG_MACH_SUN4I) ||
+ IS_ENABLED(CONFIG_MACH_SUN7I) ||
+ IS_ENABLED(CONFIG_MACH_SUN8I_R40)) {
+ start_pin = SUNXI_GPI(4);
+ mux = SUNXI_GPI_SDC3;
+ } else if (IS_ENABLED(CONFIG_MACH_SUN6I)) {
+ start_pin = SUNXI_GPC(6);
+ mux = SUN6I_GPC_SDC3;
+ num_pins = 10;
+ sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUN6I_GPC_SDC3);
+ sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
}
-
- sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUN6I_GPC_SDC3);
- sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
- sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
-#endif
break;
default:
printf("sunxi: invalid MMC slot %d for pinmux setup\n", sdc);
- break;
+ return;
+ }
+
+ if (start_pin == ~0 || mux == ~0) {
+ printf("ERROR: No pinmux setup defined for MMC%d!\n", sdc);
+ return;
+ }
+
+ for (pin = start_pin; pin < start_pin + num_pins; pin++) {
+ sunxi_gpio_set_cfgpin(pin, mux);
+ sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_drv(pin, 2);
}
}
> ---
>
> arch/arm/include/asm/arch-sunxi/gpio.h | 4 -
> arch/arm/mach-sunxi/Kconfig | 21 +----
> board/sunxi/board.c | 101 +++++++------------------
> configs/A20-Olimex-SOM-EVB_defconfig | 1 -
> configs/Sinlinx_SinA31s_defconfig | 1 -
> configs/Yones_Toptech_BD1078_defconfig | 2 +-
> configs/parrot_r16_defconfig | 1 -
> 7 files changed, 34 insertions(+), 97 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
> index 2969a530ae1..43b1b97391a 100644
> --- a/arch/arm/include/asm/arch-sunxi/gpio.h
> +++ b/arch/arm/include/asm/arch-sunxi/gpio.h
> @@ -148,8 +148,6 @@ enum sunxi_gpio_number {
> #define SUNXI_GPA_EMAC 2
> #define SUN6I_GPA_GMAC 2
> #define SUN7I_GPA_GMAC 5
> -#define SUN6I_GPA_SDC2 5
> -#define SUN6I_GPA_SDC3 4
> #define SUN8I_H3_GPA_UART0 2
>
> #define SUN4I_GPB_PWM 2
> @@ -173,12 +171,10 @@ enum sunxi_gpio_number {
> #define SUN6I_GPC_SDC3 4
> #define SUN50I_GPC_SPI0 4
>
> -#define SUN8I_GPD_SDC1 3
> #define SUNXI_GPD_LCD0 2
> #define SUNXI_GPD_LVDS0 3
> #define SUNXI_GPD_PWM 2
>
> -#define SUN5I_GPE_SDC2 3
> #define SUN8I_GPE_TWI2 3
> #define SUN50I_GPE_TWI2 3
>
> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> index 1d4a4fdd0c5..7308f977a59 100644
> --- a/arch/arm/mach-sunxi/Kconfig
> +++ b/arch/arm/mach-sunxi/Kconfig
> @@ -677,24 +677,11 @@ config MMC3_CD_PIN
> ---help---
> See MMC0_CD_PIN help text.
>
> -config MMC1_PINS
> - string "Pins for mmc1"
> - default ""
> - ---help---
> - Set the pins used for mmc1, when applicable. This takes a string in the
> - format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
> -
> -config MMC2_PINS
> - string "Pins for mmc2"
> - default ""
> - ---help---
> - See MMC1_PINS help text.
> -
> -config MMC3_PINS
> - string "Pins for mmc3"
> - default ""
> +config MMC1_PINS_PH
> + bool "Pins for mmc1 are on Port H"
> + depends on MACH_SUN4I || MACH_SUN7I || MACH_SUN8I_R40
> ---help---
> - See MMC1_PINS help text.
> + Select this option for boards where mmc1 uses the Port H pinmux.
>
> config MMC_SUNXI_SLOT_EXTRA
> int "mmc extra slot number"
> diff --git a/board/sunxi/board.c b/board/sunxi/board.c
> index 2b7d655678d..418dc0ce756 100644
> --- a/board/sunxi/board.c
> +++ b/board/sunxi/board.c
> @@ -413,7 +413,6 @@ void board_nand_init(void)
> static void mmc_pinmux_setup(int sdc)
> {
> unsigned int pin;
> - __maybe_unused int pins;
>
> switch (sdc) {
> case 0:
> @@ -426,11 +425,9 @@ static void mmc_pinmux_setup(int sdc)
> break;
>
> case 1:
> - pins = sunxi_name_to_gpio_bank(CONFIG_MMC1_PINS);
> -
> #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) || \
> defined(CONFIG_MACH_SUN8I_R40)
> - if (pins == SUNXI_GPIO_H) {
> + if (IS_ENABLED(CONFIG_MMC1_PINS_PH)) {
> /* SDC1: PH22-PH-27 */
> for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) {
> sunxi_gpio_set_cfgpin(pin, SUN4I_GPH_SDC1);
> @@ -460,27 +457,16 @@ static void mmc_pinmux_setup(int sdc)
> sunxi_gpio_set_drv(pin, 2);
> }
> #elif defined(CONFIG_MACH_SUN8I)
> - if (pins == SUNXI_GPIO_D) {
> - /* SDC1: PD2-PD7 */
> - for (pin = SUNXI_GPD(2); pin <= SUNXI_GPD(7); pin++) {
> - sunxi_gpio_set_cfgpin(pin, SUN8I_GPD_SDC1);
> - sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> - sunxi_gpio_set_drv(pin, 2);
> - }
> - } else {
> - /* SDC1: PG0-PG5 */
> - for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) {
> - sunxi_gpio_set_cfgpin(pin, SUN8I_GPG_SDC1);
> - sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> - sunxi_gpio_set_drv(pin, 2);
> - }
> + /* SDC1: PG0-PG5 */
> + for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) {
> + sunxi_gpio_set_cfgpin(pin, SUN8I_GPG_SDC1);
> + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> + sunxi_gpio_set_drv(pin, 2);
> }
> #endif
> break;
>
> case 2:
> - pins = sunxi_name_to_gpio_bank(CONFIG_MMC2_PINS);
> -
> #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I)
> /* SDC2: PC6-PC11 */
> for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) {
> @@ -489,41 +475,23 @@ static void mmc_pinmux_setup(int sdc)
> sunxi_gpio_set_drv(pin, 2);
> }
> #elif defined(CONFIG_MACH_SUN5I)
> - if (pins == SUNXI_GPIO_E) {
> - /* SDC2: PE4-PE9 */
> - for (pin = SUNXI_GPE(4); pin <= SUNXI_GPD(9); pin++) {
> - sunxi_gpio_set_cfgpin(pin, SUN5I_GPE_SDC2);
> - sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> - sunxi_gpio_set_drv(pin, 2);
> - }
> - } else {
> - /* SDC2: PC6-PC15 */
> - for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
> - sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
> - sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> - sunxi_gpio_set_drv(pin, 2);
> - }
> + /* SDC2: PC6-PC15 */
> + for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
> + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
> + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> + sunxi_gpio_set_drv(pin, 2);
> }
> #elif defined(CONFIG_MACH_SUN6I)
> - if (pins == SUNXI_GPIO_A) {
> - /* SDC2: PA9-PA14 */
> - for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) {
> - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC2);
> - sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> - sunxi_gpio_set_drv(pin, 2);
> - }
> - } else {
> - /* SDC2: PC6-PC15, PC24 */
> - for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
> - sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
> - sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> - sunxi_gpio_set_drv(pin, 2);
> - }
> -
> - sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);
> - sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
> - sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
> + /* SDC2: PC6-PC15, PC24 */
> + for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
> + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2);
> + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> + sunxi_gpio_set_drv(pin, 2);
> }
> +
> + sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);
> + sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
> + sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
> #elif defined(CONFIG_MACH_SUN8I_R40)
> /* SDC2: PC6-PC15, PC24 */
> for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
> @@ -579,8 +547,6 @@ static void mmc_pinmux_setup(int sdc)
> break;
>
> case 3:
> - pins = sunxi_name_to_gpio_bank(CONFIG_MMC3_PINS);
> -
> #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) || \
> defined(CONFIG_MACH_SUN8I_R40)
> /* SDC3: PI4-PI9 */
> @@ -590,25 +556,16 @@ static void mmc_pinmux_setup(int sdc)
> sunxi_gpio_set_drv(pin, 2);
> }
> #elif defined(CONFIG_MACH_SUN6I)
> - if (pins == SUNXI_GPIO_A) {
> - /* SDC3: PA9-PA14 */
> - for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) {
> - sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC3);
> - sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> - sunxi_gpio_set_drv(pin, 2);
> - }
> - } else {
> - /* SDC3: PC6-PC15, PC24 */
> - for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
> - sunxi_gpio_set_cfgpin(pin, SUN6I_GPC_SDC3);
> - sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> - sunxi_gpio_set_drv(pin, 2);
> - }
> -
> - sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUN6I_GPC_SDC3);
> - sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
> - sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
> + /* SDC3: PC6-PC15, PC24 */
> + for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {
> + sunxi_gpio_set_cfgpin(pin, SUN6I_GPC_SDC3);
> + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
> + sunxi_gpio_set_drv(pin, 2);
> }
> +
> + sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUN6I_GPC_SDC3);
> + sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);
> + sunxi_gpio_set_drv(SUNXI_GPC(24), 2);
> #endif
> break;
>
> diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
> index ececdaca150..075d999e1c9 100644
> --- a/configs/A20-Olimex-SOM-EVB_defconfig
> +++ b/configs/A20-Olimex-SOM-EVB_defconfig
> @@ -6,7 +6,6 @@ CONFIG_MACH_SUN7I=y
> CONFIG_DRAM_CLK=384
> CONFIG_MMC0_CD_PIN="PH1"
> CONFIG_MMC3_CD_PIN="PH0"
> -CONFIG_MMC3_PINS="PH"
> CONFIG_MMC_SUNXI_SLOT_EXTRA=3
> CONFIG_USB0_VBUS_PIN="PB9"
> CONFIG_USB0_VBUS_DET="PH5"
> diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig
> index 8fa8246344c..238b0073e79 100644
> --- a/configs/Sinlinx_SinA31s_defconfig
> +++ b/configs/Sinlinx_SinA31s_defconfig
> @@ -6,7 +6,6 @@ CONFIG_MACH_SUN6I=y
> CONFIG_DRAM_CLK=432
> CONFIG_DRAM_ZQ=251
> CONFIG_MMC0_CD_PIN="PA4"
> -CONFIG_MMC3_PINS="PC"
> CONFIG_MMC_SUNXI_SLOT_EXTRA=3
> CONFIG_USB1_VBUS_PIN=""
> CONFIG_USB2_VBUS_PIN=""
> diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig
> index 1b88cfabf04..f1ceb8b5527 100644
> --- a/configs/Yones_Toptech_BD1078_defconfig
> +++ b/configs/Yones_Toptech_BD1078_defconfig
> @@ -6,7 +6,7 @@ CONFIG_MACH_SUN7I=y
> CONFIG_DRAM_CLK=408
> CONFIG_MMC0_CD_PIN="PH1"
> CONFIG_MMC1_CD_PIN="PH2"
> -CONFIG_MMC1_PINS="PH"
> +CONFIG_MMC1_PINS_PH=y
> CONFIG_MMC_SUNXI_SLOT_EXTRA=1
> CONFIG_USB0_VBUS_PIN="PB9"
> CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
> diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig
> index de340e230f2..d56c4504b6a 100644
> --- a/configs/parrot_r16_defconfig
> +++ b/configs/parrot_r16_defconfig
> @@ -6,7 +6,6 @@ CONFIG_MACH_SUN8I_A33=y
> CONFIG_DRAM_CLK=600
> CONFIG_DRAM_ZQ=15291
> CONFIG_MMC0_CD_PIN="PD14"
> -CONFIG_MMC2_PINS="PC"
> CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> CONFIG_USB0_ID_DET="PD10"
> CONFIG_USB1_VBUS_PIN="PD12"
>
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