[PATCH 4/4] rtc: rx8025: revise single register write to use offset

[Mathew McBride]

Writing of individual registers was not functioning
correctly as a 0 'offset' byte under DM-managed
I2C was being appended in front of register we
wanted to access.

Signed-off-by: Mathew McBride <matt at traverse.com.au>
---
 drivers/rtc/rx8025.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/rtc/rx8025.c b/drivers/rtc/rx8025.c
index 9423a1bb82..1394c2306a 100644
--- a/drivers/rtc/rx8025.c
+++ b/drivers/rtc/rx8025.c
@@ -214,11 +214,14 @@ static int rx8025_rtc_reset(struct udevice *dev)
  */
 static int rtc_write(struct udevice *dev, uchar reg, uchar val)
 {
-	uchar buf[2];
-	buf[0] = reg << 4;
-	buf[1] = val;
+	/* The RX8025/RX8035 uses the top 4 bits of the
+	 * 'offset' byte as the start register address,
+	 * and the bottom 4 bits as a 'transfer' mode setting
+	 * (only applicable for reads)
+	 */
+	u8 offset = (reg << 4);
 
-	if (dm_i2c_write(dev, 0, buf, 2)) {
+	if (dm_i2c_reg_write(dev, offset, val)) {
 		printf("Error writing to RTC\n");
 		return -EIO;
 	}
-- 
2.30.1