[PATCH] pci: Fix configuring io/memory base and limit registers of PCI bridges

[Tom Rini]

On Fri, Sep 10, 2021 at 01:33:35PM +0200, Pali Rohár wrote:

> Lower 4 bits of PCI_MEMORY_BASE and PCI_MEMORY_LIMIT registers are reserved
> and should be zero. So do not set them to non-zero value.
> 
> Lower 4 bits of PCI_PREF_MEMORY_BASE and PCI_PREF_MEMORY_LIMIT registers
> contain information if 64-bit memory addressing is supported. So preserve
> this information when overwriting these registers.
> 
> Lower 4 bits of PCI_IO_BASE and PCI_IO_LIMIT register contain information
> if 32-bit io addressing is supported. So preserve this information and do
> not try to configure 32-bit io addressing (via PCI_IO_BASE_UPPER16 and
> PCI_IO_LIMIT_UPPER16 registers) when it is unsupported.
> 
> Signed-off-by: Pali Rohár <pali at kernel.org>
> Reviewed-by: Stefan Roese <sr at denx.de>

Applied to u-boot/next, thanks!

-- 
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 659 bytes
Desc: not available
URL: <https://lists.denx.de/pipermail/u-boot/attachments/20210923/1ce2425d/attachment.sig>