[PATCH 1/1] phy: marvell: cp110: Support SATA invert polarity

[Stefan Roese]

On 15.09.21 15:45, Denis Odintsov wrote:
> In commit b24bb99d cp110 configuration initially done in u-boot
> was removed and delegated to atf firmware as smc call.
> That commit didn't account for later introduced in d13b740c SATA invert polarity support.
> 
> This patch adds support of passing SATA invert polarity flags to atf
> firmware during the smc call.
> 
> Signed-off-by: Denis Odintsov <shiva at mail.ru>
> Cc: Baruch Siach <baruch at tkos.co.il>
> Cc: Rabeeh Khoury <rabeeh at solid-run.com>
> Cc: Stefan Roese <sr at denx.de>

Reviewed-by: Stefan Roese <sr at denx.de>

Thanks,
Stefan

> ---
>   drivers/phy/marvell/comphy_cp110.c | 7 ++++++-
>   1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c
> index 418318d12f..4fe2dfcdd1 100644
> --- a/drivers/phy/marvell/comphy_cp110.c
> +++ b/drivers/phy/marvell/comphy_cp110.c
> @@ -36,6 +36,10 @@ DECLARE_GLOBAL_DATA_PTR;
>   			(COMPHY_CALLER_UBOOT | ((pcie_width) << 18) |	\
>   			((clk_src) << 17) | COMPHY_FW_FORMAT(mode, 0, speeds))
>   
> +/* Invert polarity are bits 1-0 of the mode */
> +#define COMPHY_FW_SATA_FORMAT(mode, invert)	\
> +			((invert) | COMPHY_FW_MODE_FORMAT(mode))
> +
>   #define COMPHY_SATA_MODE	0x1
>   #define COMPHY_SGMII_MODE	0x2	/* SGMII 1G */
>   #define COMPHY_HS_SGMII_MODE	0x3	/* SGMII 2.5G */
> @@ -607,7 +611,8 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
>   			break;
>   		case COMPHY_TYPE_SATA0:
>   		case COMPHY_TYPE_SATA1:
> -			mode =  COMPHY_FW_MODE_FORMAT(COMPHY_SATA_MODE);
> +			mode = COMPHY_FW_SATA_FORMAT(COMPHY_SATA_MODE,
> +						     serdes_map[lane].invert);
>   			ret = comphy_sata_power_up(lane, hpipe_base_addr,
>   						   comphy_base_addr,
>   						   ptr_chip_cfg->cp_index,
> 


Viele Grüße,
Stefan

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