[PATCH] board: ti: Add support for the AM335x GP EVM mini board
Amjad Ouled-Ameur
aouledameur at baylibre.com
Tue Sep 28 11:41:36 CEST 2021
From: Andreas Dannenberg <dannenberg at ti.com>
This is not really a new board but rather a minimal bootloader solution
for the AM335x GP EVM. In terms of interfaces, it only supports booting
from MMC0 or UART0 and only activates a minimal set of drivers that are
that are necessary to run the device such as DDR, I2C, and PMIC.
The goal is to provide a bare minimum starting point to boot Linux for
basing custom board-ports on. The limited complexity of this solution
should make it easier to achieve a successful boot to U-Boot prompt vs.
trying to pair down the full-featured multi-platform AM335x U-Boot
available through am335x_evm_defconfig.
Signed-off-by: Andreas Dannenberg <dannenberg at ti.com>
[Amjad: fix checkpatch and compile warnings]
Signed-off-by: Amjad Ouled-Ameur <aouledameur at baylibre.com>
---
Tests:
- This has been tested on Am335x platform, the board boots successfully
to u-boot prompt and runs basic commands seamlessly, please find the logs
here: [0]
However, regarding the kernel boot test, this patch does not actually
guaranteey that since its purpose is to mainly allow the user to achieve a
successful boot to U-boot prompt.
[0]: https://pastebin.com/ixQ2yB9n
MAINTAINERS | 1 +
arch/arm/dts/Makefile | 1 +
arch/arm/dts/am335x-bone-common.dtsi | 1 +
arch/arm/dts/am335x-evm-mini.dts | 166 ++++++++++++++++++
arch/arm/mach-omap2/am33xx/Kconfig | 30 ++++
board/ti/am335x/Kconfig | 13 +-
board/ti/am335x/Makefile | 6 +-
board/ti/am335x/board_hs_mini.h | 19 ++
board/ti/am335x/board_mini.c | 249 +++++++++++++++++++++++++++
board/ti/am335x/board_mini.h | 44 +++++
board/ti/am335x/mux_mini.c | 109 ++++++++++++
configs/am335x_evm_mini_defconfig | 42 +++++
configs/am335x_hs_evm_mini_defconfig | 46 +++++
include/configs/am335x_evm_mini.h | 96 +++++++++++
14 files changed, 820 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/dts/am335x-evm-mini.dts
create mode 100644 board/ti/am335x/board_hs_mini.h
create mode 100644 board/ti/am335x/board_mini.c
create mode 100644 board/ti/am335x/board_mini.h
create mode 100644 board/ti/am335x/mux_mini.c
create mode 100644 configs/am335x_evm_mini_defconfig
create mode 100644 configs/am335x_hs_evm_mini_defconfig
create mode 100644 include/configs/am335x_evm_mini.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 5370b550648e..09b942acd109 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -492,6 +492,7 @@ F: arch/arm/mach-keystone/
F: arch/arm/mach-omap2/
F: arch/arm/include/asm/arch-omap*/
F: arch/arm/include/asm/ti-common/
+F: arch/arm/dts/am335x*
F: board/ti/
F: drivers/dma/ti*
F: drivers/firmware/ti_sci.*
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fc16a57e60b0..faf8f438bf29 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -360,6 +360,7 @@ dtb-$(CONFIG_AM33XX) += \
am335x-brsmarc1.dtb \
am335x-draco.dtb \
am335x-evm.dtb \
+ am335x-evm-mini.dtb \
am335x-evmsk.dtb \
am335x-bonegreen.dtb \
am335x-icev2.dtb \
diff --git a/arch/arm/dts/am335x-bone-common.dtsi b/arch/arm/dts/am335x-bone-common.dtsi
index 35ec1a8df870..a87558686709 100644
--- a/arch/arm/dts/am335x-bone-common.dtsi
+++ b/arch/arm/dts/am335x-bone-common.dtsi
@@ -211,6 +211,7 @@
tps: tps at 24 {
reg = <0x24>;
+ #interrupt-cells = <1>;
};
baseboard_eeprom: baseboard_eeprom at 50 {
diff --git a/arch/arm/dts/am335x-evm-mini.dts b/arch/arm/dts/am335x-evm-mini.dts
new file mode 100644
index 000000000000..f45da0fd3f6f
--- /dev/null
+++ b/arch/arm/dts/am335x-evm-mini.dts
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ model = "TI AM335x EVM MINI";
+ compatible = "ti,am335x-evm-mini", "ti,am335x-evm", "ti,am33xx";
+
+ chosen {
+ stdout-path = &uart0;
+ tick-timer = &timer2;
+ };
+
+ cpus {
+ cpu at 0 {
+ cpu0-supply = <&vdd1_reg>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>; /* 256 MB */
+ };
+
+ vbat: fixedregulator at 0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbat";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ };
+};
+
+&am33xx_pinmux {
+ i2c0_pins: pinmux_i2c0_pins {
+ pinctrl-single,pins = <
+ 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
+ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
+ >;
+ };
+
+ uart0_pins: pinmux_uart0_pins {
+ pinctrl-single,pins = <
+ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
+ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+ >;
+ };
+
+ mmc1_pins: pinmux_mmc1_pins {
+ pinctrl-single,pins = <
+ 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
+ >;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ tps: tps at 2d {
+ reg = <0x2d>;
+ };
+};
+
+#include "tps65910.dtsi"
+
+&tps {
+ vcc1-supply = <&vbat>;
+ vcc2-supply = <&vbat>;
+ vcc3-supply = <&vbat>;
+ vcc4-supply = <&vbat>;
+ vcc5-supply = <&vbat>;
+ vcc6-supply = <&vbat>;
+ vcc7-supply = <&vbat>;
+ vccio-supply = <&vbat>;
+
+ regulators {
+ vrtc_reg: regulator at 0 {
+ regulator-always-on;
+ };
+
+ vio_reg: regulator at 1 {
+ regulator-always-on;
+ };
+
+ vdd1_reg: regulator at 2 {
+ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+ regulator-name = "vdd_mpu";
+ regulator-min-microvolt = <912500>;
+ regulator-max-microvolt = <1312500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vdd2_reg: regulator at 3 {
+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <912500>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vdd3_reg: regulator at 4 {
+ regulator-always-on;
+ };
+
+ vdig1_reg: regulator at 5 {
+ regulator-always-on;
+ };
+
+ vdig2_reg: regulator at 6 {
+ regulator-always-on;
+ };
+
+ vpll_reg: regulator at 7 {
+ regulator-always-on;
+ };
+
+ vdac_reg: regulator at 8 {
+ regulator-always-on;
+ };
+
+ vaux1_reg: regulator at 9 {
+ regulator-always-on;
+ };
+
+ vaux2_reg: regulator at 10 {
+ regulator-always-on;
+ };
+
+ vaux33_reg: regulator at 11 {
+ regulator-always-on;
+ };
+
+ vmmc_reg: regulator at 12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+ };
+};
+
+&mmc1 {
+ status = "okay";
+ vmmc-supply = <&vmmc_reg>;
+ bus-width = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
index 4268419b166b..296559a00c15 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -63,6 +63,36 @@ config TARGET_AM335X_EVM
to write software and develop hardware around
an AM335x processor subsystem.
+config TARGET_AM335X_EVM_MINI
+ bool "Support am335x_evm_mini"
+ select BOARD_LATE_INIT
+ select DM
+ select DM_GPIO
+ select DM_SERIAL
+ imply CMD_DM
+ imply SPL_DM
+ imply SPL_DM_SEQ_ALIAS
+ imply SPL_ENV_SUPPORT
+ imply SPL_FS_EXT4
+ imply SPL_FS_FAT
+ imply SPL_GPIO_SUPPORT
+ imply SPL_I2C_SUPPORT
+ imply SPL_LIBCOMMON_SUPPORT
+ imply SPL_LIBDISK_SUPPORT
+ imply SPL_LIBGENERIC_SUPPORT
+ imply SPL_MMC_SUPPORT
+ imply SPL_OF_LIBFDT
+ imply SPL_POWER_SUPPORT
+ imply SPL_SEPARATE_BSS
+ imply SPL_SERIAL_SUPPORT
+ imply SPL_SYS_MALLOC_SIMPLE
+ imply SPL_YMODEM_SUPPORT
+ help
+ This option specifies support for the AM335x
+ GP and HS EVM development platforms using a minimal
+ system configuration, only supporting a small subset
+ of boot media and other features.
+
config TARGET_AM335X_BALTOS
bool "Support am335x_baltos"
select BOARD_LATE_INIT
diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig
index b66ca1a57982..333fce9caa59 100644
--- a/board/ti/am335x/Kconfig
+++ b/board/ti/am335x/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_AM335X_EVM
+if TARGET_AM335X_EVM || TARGET_AM335X_EVM_MINI
config SYS_BOARD
default "am335x"
@@ -9,9 +9,20 @@ config SYS_VENDOR
config SYS_SOC
default "am33xx"
+if TARGET_AM335X_EVM
+
config SYS_CONFIG_NAME
default "am335x_evm"
+endif
+
+if TARGET_AM335X_EVM_MINI
+
+config SYS_CONFIG_NAME
+ default "am335x_evm_mini"
+
+endif
+
config NOR
bool "Support for NOR flash"
help
diff --git a/board/ti/am335x/Makefile b/board/ti/am335x/Makefile
index c34b9b1dd8a7..7b424734095a 100644
--- a/board/ti/am335x/Makefile
+++ b/board/ti/am335x/Makefile
@@ -5,7 +5,9 @@
# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
-obj-y := mux.o
+obj-$(CONFIG_TARGET_AM335X_EVM) := mux.o
+obj-$(CONFIG_TARGET_AM335X_EVM_MINI) := mux_mini.o
endif
-obj-y += board.o
+obj-$(CONFIG_TARGET_AM335X_EVM) += board.o
+obj-$(CONFIG_TARGET_AM335X_EVM_MINI) += board_mini.o
diff --git a/board/ti/am335x/board_hs_mini.h b/board/ti/am335x/board_hs_mini.h
new file mode 100644
index 000000000000..e03ba141f286
--- /dev/null
+++ b/board/ti/am335x/board_hs_mini.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * TI AM437x boards information header
+ * Derived from AM335x board.
+ *
+ * Copyright (C) 2020, Texas Instruments, Incorporated - http://www.ti.com/
+ */
+
+#ifndef _BOARD_HS_H_
+#define _BOARD_HS_H_
+
+#ifdef CONFIG_TI_SECURE_DEVICE
+void board_fit_image_post_process(void **p_image, size_t *p_size)
+{
+ secure_boot_verify_image(p_image, p_size);
+}
+#endif
+
+#endif
diff --git a/board/ti/am335x/board_mini.c b/board/ti/am335x/board_mini.c
new file mode 100644
index 000000000000..94f0a2910be3
--- /dev/null
+++ b/board/ti/am335x/board_mini.c
@@ -0,0 +1,249 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Mini board functions for TI AM335X based boards
+ *
+ * Copyright (C) 2020, Texas Instruments, Incorporated - http://www.ti.com/
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <env.h>
+#include <errno.h>
+#include <init.h>
+#include <spl.h>
+#include <serial.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/omap.h>
+#include <asm/arch/ddr_defs.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/mem.h>
+#include <asm/io.h>
+#include <asm/emif.h>
+#include <asm/omap_common.h>
+#include <asm/omap_sec_common.h>
+#include <asm/omap_mmc.h>
+#include <i2c.h>
+#include <power/tps65910.h>
+#include <env_internal.h>
+#include <watchdog.h>
+#include "board_mini.h"
+#include "board_hs_mini.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct serial_device *default_serial_console(void)
+{
+ return &eserial1_device;
+}
+
+static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
+static const struct ddr_data ddr3_evm_data = {
+ .datardsratio0 = MT41J512M8RH125_RD_DQS,
+ .datawdsratio0 = MT41J512M8RH125_WR_DQS,
+ .datafwsratio0 = MT41J512M8RH125_PHY_FIFO_WE,
+ .datawrsratio0 = MT41J512M8RH125_PHY_WR_DATA,
+};
+
+static const struct cmd_control ddr3_evm_cmd_ctrl_data = {
+ .cmd0csratio = MT41J512M8RH125_RATIO,
+ .cmd0iclkout = MT41J512M8RH125_INVERT_CLKOUT,
+
+ .cmd1csratio = MT41J512M8RH125_RATIO,
+ .cmd1iclkout = MT41J512M8RH125_INVERT_CLKOUT,
+
+ .cmd2csratio = MT41J512M8RH125_RATIO,
+ .cmd2iclkout = MT41J512M8RH125_INVERT_CLKOUT,
+};
+
+static struct emif_regs ddr3_evm_emif_reg_data = {
+ .sdram_config = MT41J512M8RH125_EMIF_SDCFG,
+ .ref_ctrl = MT41J512M8RH125_EMIF_SDREF,
+ .sdram_tim1 = MT41J512M8RH125_EMIF_TIM1,
+ .sdram_tim2 = MT41J512M8RH125_EMIF_TIM2,
+ .sdram_tim3 = MT41J512M8RH125_EMIF_TIM3,
+ .ocp_config = EMIF_OCP_CONFIG_AM335X_EVM,
+ .zq_config = MT41J512M8RH125_ZQ_CFG,
+ .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
+ PHY_EN_DYN_PWRDN,
+};
+
+const struct dpll_params *get_dpll_ddr_params(void)
+{
+ int ind = get_sys_clk_index();
+
+ return &dpll_ddr3_303MHz[ind];
+}
+
+const struct dpll_params *get_dpll_mpu_params(void)
+{
+ int ind = get_sys_clk_index();
+ int freq = am335x_get_efuse_mpu_max_freq(cdev);
+
+ switch (freq) {
+ case MPUPLL_M_1000:
+ return &dpll_mpu_opp[ind][5];
+ case MPUPLL_M_800:
+ return &dpll_mpu_opp[ind][4];
+ case MPUPLL_M_720:
+ return &dpll_mpu_opp[ind][3];
+ case MPUPLL_M_600:
+ return &dpll_mpu_opp[ind][2];
+ case MPUPLL_M_500:
+ return &dpll_mpu_opp100;
+ case MPUPLL_M_300:
+ return &dpll_mpu_opp[ind][0];
+ }
+
+ return &dpll_mpu_opp[ind][0];
+}
+
+void scale_vcores_generic(int freq)
+{
+ int sil_rev, mpu_vdd;
+
+ /*
+ * The GP EVM, IDK and EVM SK use a TPS65910 PMIC. For all
+ * MPU frequencies we support we use a CORE voltage of
+ * 1.10V. For MPU voltage we need to switch based on
+ * the frequency we are running at.
+ */
+
+ if (IS_ENABLED(CONFIG_DM_I2C)) {
+ if (power_tps65910_init(0))
+ return;
+ } else {
+ if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
+ return;
+ }
+
+ /*
+ * Depending on MPU clock and PG we will need a different
+ * VDD to drive at that speed.
+ */
+ sil_rev = readl(&cdev->deviceid) >> 28;
+ mpu_vdd = am335x_get_tps65910_mpu_vdd(sil_rev, freq);
+
+ /* Tell the TPS65910 to use i2c */
+ tps65910_set_i2c_control();
+
+ /* First update MPU voltage. */
+ if (tps65910_voltage_update(MPU, mpu_vdd))
+ return;
+
+ /* Second, update the CORE voltage. */
+ if (tps65910_voltage_update(CORE, TPS65910_OP_REG_SEL_1_1_0))
+ return;
+}
+
+void gpi2c_init(void)
+{
+ /* When needed to be invoked prior to BSS initialization */
+ static bool first_time = true;
+
+ if (first_time) {
+ enable_i2c0_pin_mux();
+ if (!IS_ENABLED(CONFIG_DM_I2C))
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
+ CONFIG_SYS_OMAP24_I2C_SLAVE);
+ first_time = false;
+ }
+}
+
+void scale_vcores(void)
+{
+ int freq;
+
+ gpi2c_init();
+ freq = am335x_get_efuse_mpu_max_freq(cdev);
+ scale_vcores_generic(freq);
+}
+
+void set_uart_mux_conf(void)
+{
+ if (CONFIG_CONS_INDEX == 1)
+ enable_uart0_pin_mux();
+ else if (CONFIG_CONS_INDEX == 2)
+ enable_uart1_pin_mux();
+ else if (CONFIG_CONS_INDEX == 3)
+ enable_uart2_pin_mux();
+ else if (CONFIG_CONS_INDEX == 4)
+ enable_uart3_pin_mux();
+ else if (CONFIG_CONS_INDEX == 5)
+ enable_uart4_pin_mux();
+ else if (CONFIG_CONS_INDEX == 6)
+ enable_uart5_pin_mux();
+}
+
+void set_mux_conf_regs(void)
+{
+ enable_board_pin_mux();
+}
+
+const struct ctrl_ioregs ioregs_evm15 = {
+ .cm0ioctl = MT41J512M8RH125_IOCTRL_VALUE,
+ .cm1ioctl = MT41J512M8RH125_IOCTRL_VALUE,
+ .cm2ioctl = MT41J512M8RH125_IOCTRL_VALUE,
+ .dt0ioctl = MT41J512M8RH125_IOCTRL_VALUE,
+ .dt1ioctl = MT41J512M8RH125_IOCTRL_VALUE,
+};
+
+void sdram_init(void)
+{
+ /* Configure for AM335x GP EVM v1.5 or later */
+ config_ddr(303, &ioregs_evm15, &ddr3_evm_data,
+ &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0);
+}
+
+int ft_board_setup(void *fdt, struct bd_info **bd)
+{
+ return 0;
+}
+
+/*
+ * Basic board specific setup. Pinmux has been handled already.
+ */
+int board_init(void)
+{
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ return 0;
+}
+
+int board_late_init(void)
+{
+ if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
+ env_set("board_name", CONFIG_SYS_BOARD);
+
+ /*
+ * Default FIT boot on HS devices. Non FIT images are not allowed
+ * on HS devices.
+ */
+ if (get_device_type() == HS_DEVICE)
+ env_set("boot_fit", "1");
+ }
+
+ return 0;
+}
+
+int board_fit_config_name_match(const char *name)
+{
+ return 0;
+}
+
+static const struct omap_hsmmc_plat am335x_mmc0_platdata = {
+ .base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE,
+ .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT,
+ .cfg.f_min = 400000,
+ .cfg.f_max = 52000000,
+ .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195,
+ .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
+};
+
+U_BOOT_DRVINFO(am335x_mmc0) = {
+ .name = "omap_hsmmc",
+ .plat = &am335x_mmc0_platdata,
+};
diff --git a/board/ti/am335x/board_mini.h b/board/ti/am335x/board_mini.h
new file mode 100644
index 000000000000..0fa1a8680027
--- /dev/null
+++ b/board/ti/am335x/board_mini.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Mini AM335x boards information header
+ *
+ * Copyright (C) 2020, Texas Instruments, Incorporated - http://www.ti.com/
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/**
+ * AM335X (EMIF_4D) EMIF REG_COS_COUNT_1, REG_COS_COUNT_2, and
+ * REG_PR_OLD_COUNT values to avoid LCDC DMA FIFO underflows and Frame
+ * Synchronization Lost errors. The values are the biggest that work
+ * reliably with offered video modes and the memory subsystem on the
+ * boards. These register have are briefly documented in "7.3.3.5.2
+ * Command Starvation" section of AM335x TRM. The REG_COS_COUNT_1 and
+ * REG_COS_COUNT_2 do not have any effect on current versions of
+ * AM335x.
+ */
+#define EMIF_OCP_CONFIG_BEAGLEBONE_BLACK 0x00141414
+#define EMIF_OCP_CONFIG_AM335X_EVM 0x003d3d3d
+
+/*
+ * We have three pin mux functions that must exist. We must be able to enable
+ * uart0, for initial output and i2c0 to read the main EEPROM. We then have a
+ * main pinmux function that can be overridden to enable all other pinmux that
+ * is required on the board.
+ */
+void enable_uart0_pin_mux(void);
+void enable_uart1_pin_mux(void);
+void enable_uart2_pin_mux(void);
+void enable_uart3_pin_mux(void);
+void enable_uart4_pin_mux(void);
+void enable_uart5_pin_mux(void);
+void enable_i2c0_pin_mux(void);
+void enable_board_pin_mux(void);
+
+#ifdef CONFIG_DM_I2C
+#define i2c_init(speed, slaveaddr)
+#define i2c_probe(chip) (NULL)
+#endif
+
+#endif
diff --git a/board/ti/am335x/mux_mini.c b/board/ti/am335x/mux_mini.c
new file mode 100644
index 000000000000..b724198b9cdf
--- /dev/null
+++ b/board/ti/am335x/mux_mini.c
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/mux.h>
+#include <asm/io.h>
+#include <i2c.h>
+#include "board_mini.h"
+
+static struct module_pin_mux uart0_pin_mux[] = {
+ {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
+ {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
+ {-1},
+};
+
+static struct module_pin_mux uart1_pin_mux[] = {
+ {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
+ {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
+ {-1},
+};
+
+static struct module_pin_mux uart2_pin_mux[] = {
+ {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
+ {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
+ {-1},
+};
+
+static struct module_pin_mux uart3_pin_mux[] = {
+ {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
+ {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
+ {-1},
+};
+
+static struct module_pin_mux uart4_pin_mux[] = {
+ {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
+ {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
+ {-1},
+};
+
+static struct module_pin_mux uart5_pin_mux[] = {
+ {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
+ {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
+ {-1},
+};
+
+static struct module_pin_mux mmc0_pin_mux[] = {
+ {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
+ {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
+ {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
+ {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
+ {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
+ {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
+ {OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */
+ {OFFSET(spi0_cs1), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* GPIO0_6 */
+ {-1},
+};
+
+static struct module_pin_mux i2c0_pin_mux[] = {
+ {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
+ PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
+ {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
+ PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
+ {-1},
+};
+
+void enable_uart0_pin_mux(void)
+{
+ configure_module_pin_mux(uart0_pin_mux);
+}
+
+void enable_uart1_pin_mux(void)
+{
+ configure_module_pin_mux(uart1_pin_mux);
+}
+
+void enable_uart2_pin_mux(void)
+{
+ configure_module_pin_mux(uart2_pin_mux);
+}
+
+void enable_uart3_pin_mux(void)
+{
+ configure_module_pin_mux(uart3_pin_mux);
+}
+
+void enable_uart4_pin_mux(void)
+{
+ configure_module_pin_mux(uart4_pin_mux);
+}
+
+void enable_uart5_pin_mux(void)
+{
+ configure_module_pin_mux(uart5_pin_mux);
+}
+
+void enable_i2c0_pin_mux(void)
+{
+ configure_module_pin_mux(i2c0_pin_mux);
+}
+
+void enable_board_pin_mux(void)
+{
+ /* Do board-specific muxes */
+ configure_module_pin_mux(mmc0_pin_mux);
+}
diff --git a/configs/am335x_evm_mini_defconfig b/configs/am335x_evm_mini_defconfig
new file mode 100644
index 000000000000..087d64d742d3
--- /dev/null
+++ b/configs/am335x_evm_mini_defconfig
@@ -0,0 +1,42 @@
+CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-evm-mini"
+CONFIG_AM33XX=y
+CONFIG_TARGET_AM335X_EVM_MINI=y
+CONFIG_SPL=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd"
+CONFIG_LOGLEVEL=3
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL_FIT_IMAGE_TINY=y
+# CONFIG_SPL_FS_EXT4 is not set
+CONFIG_SPL_I2C=y
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_POWER=y
+# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
+CONFIG_CMD_SPL=y
+# CONFIG_CMD_EEPROM is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_SPL_ENV_IS_NOWHERE=y
+CONFIG_VERSION_VARIABLE=y
+# CONFIG_NET is not set
+CONFIG_DM_I2C=y
+CONFIG_MISC=y
+# CONFIG_MMC_HW_PARTITIONING is not set
+CONFIG_MMC_OMAP_HS=y
+CONFIG_TIMER=y
+CONFIG_OMAP_TIMER=y
+CONFIG_DYNAMIC_CRC_TABLE=y
+CONFIG_RSA=y
+CONFIG_LZO=y
+# CONFIG_OF_LIBFDT_OVERLAY is not set
diff --git a/configs/am335x_hs_evm_mini_defconfig b/configs/am335x_hs_evm_mini_defconfig
new file mode 100644
index 000000000000..fe61d31e8bfc
--- /dev/null
+++ b/configs/am335x_hs_evm_mini_defconfig
@@ -0,0 +1,46 @@
+CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_ISW_ENTRY_ADDR=0x40300350
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-evm-mini"
+CONFIG_AM33XX=y
+CONFIG_TARGET_AM335X_EVM_MINI=y
+CONFIG_SPL=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd"
+CONFIG_LOGLEVEL=3
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL_FIT_IMAGE_TINY=y
+# CONFIG_SPL_FS_EXT4 is not set
+CONFIG_SPL_I2C=y
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_POWER=y
+# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
+CONFIG_CMD_SPL=y
+# CONFIG_CMD_EEPROM is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_SPL_ENV_IS_NOWHERE=y
+CONFIG_VERSION_VARIABLE=y
+# CONFIG_NET is not set
+CONFIG_DM_I2C=y
+CONFIG_MISC=y
+# CONFIG_MMC_HW_PARTITIONING is not set
+CONFIG_MMC_OMAP_HS=y
+CONFIG_TIMER=y
+CONFIG_OMAP_TIMER=y
+CONFIG_DYNAMIC_CRC_TABLE=y
+CONFIG_RSA=y
+CONFIG_LZO=y
+# CONFIG_OF_LIBFDT_OVERLAY is not set
diff --git a/include/configs/am335x_evm_mini.h b/include/configs/am335x_evm_mini.h
new file mode 100644
index 000000000000..f4c8dfe78e1a
--- /dev/null
+++ b/include/configs/am335x_evm_mini.h
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+#ifndef __CONFIG_AM335X_EVM_MINI_H
+#define __CONFIG_AM335X_EVM_MINI_H
+
+#include <configs/ti_am335x_common.h>
+#include <linux/sizes.h>
+
+#ifndef CONFIG_SPL_BUILD
+# define CONFIG_TIMESTAMP
+#endif
+
+#define CONFIG_SYS_BOOTM_LEN SZ_16M
+
+#define CONFIG_MACH_TYPE MACH_TYPE_AM335XEVM
+
+/* Clock Defines */
+#define V_OSCK 24000000 /* Clock output from T2 */
+#define V_SCLK (V_OSCK)
+
+#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \
+ "bootcmd_" #devtypel #instance "=" \
+ "setenv mmcdev " #instance "; "\
+ "setenv bootpart " #instance ":2 ; "\
+ "run mmcboot\0"
+
+#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \
+ #devtypel #instance " "
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(LEGACY_MMC, legacy_mmc, 0)
+
+#include <config_distro_bootcmd.h>
+
+#ifndef CONFIG_SPL_BUILD
+#include <environment/ti/mmc.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ DEFAULT_LINUX_BOOT_ENV \
+ DEFAULT_MMC_TI_ARGS \
+ DEFAULT_FIT_TI_ARGS \
+ "bootpart=0:2\0" \
+ "bootdir=/boot\0" \
+ "bootfile=zImage\0" \
+ "fdtfile=undefined\0" \
+ "console=ttyS0,115200n8\0" \
+ "partitions=" \
+ "uuid_disk=${uuid_gpt_disk};" \
+ "name=bootloader,start=384K,size=1792K," \
+ "uuid=${uuid_gpt_bootloader};" \
+ "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
+ "optargs=\0" \
+ "ramroot=/dev/ram0 rw\0" \
+ "ramrootfstype=ext2\0" \
+ "ramargs=setenv bootargs console=${console} " \
+ "${optargs} " \
+ "root=${ramroot} " \
+ "rootfstype=${ramrootfstype}\0" \
+ "loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
+ "ramboot=echo Booting from ramdisk ...; " \
+ "run ramargs; " \
+ "bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0" \
+ "default_device_tree=am335x-evm.dtb\0" \
+ "findfdt=" \
+ "setenv name_fdt ${default_device_tree};" \
+ "setenv fdtfile ${name_fdt}\0" \
+ "init_console=" \
+ "setenv console ttyS0,115200n8\0" \
+ BOOTENV
+#endif
+
+/* NS16550 Configuration */
+#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
+#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
+#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
+#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
+#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
+#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
+
+/* PMIC support */
+#define CONFIG_POWER_TPS65910
+
+/*
+ * Disable MMC DM for SPL build and can be re-enabled after adding
+ * DM support in SPL
+ */
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_DM_MMC
+#undef CONFIG_TIMER
+#endif
+
+#endif /* ! __CONFIG_AM335X_EVM_MINI_H */
--
2.25.1
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