[RFC][PATCH] mtd: spi: Set CONFIG_SF_DEFAULT_MODE default to 0

Tom Rini trini at konsulko.com
Tue Sep 28 20:45:03 CEST 2021


On Tue, Sep 14, 2021 at 08:28:24PM +0200, Marek Vasut wrote:

> Before e2e95e5e254 ("spi: Update speed/mode on change") most systems
> silently defaulted to SF bus mode 0. Now the mode is always updated,
> which causes breakage. It seems most SF which are used as boot media
> operate in bus mode 0, so switch that as the default.
> 
> This should fix booting at least on Altera SoCFPGA, ST STM32, Xilinx
> ZynqMP, NXP iMX and Rockchip SoCs, which recently ran into trouble
> with mode 3. Marvell Kirkwood and Xilinx microblaze need to be checked
> as those might need mode 3.
> 
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski at hitachi-powergrids.com>
> Cc: Andreas Biessmann <andreas at biessmann.org>
> Cc: Eugen Hristev <eugen.hristev at microchip.com>
> Cc: Michal Simek <michal.simek at xilinx.com>
> Cc: Patrice Chotard <patrice.chotard at foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay at foss.st.com>
> Cc: Peng Fan <peng.fan at nxp.com>
> Cc: Siew Chin Lim <elly.siew.chin.lim at intel.com>
> Cc: Tom Rini <trini at konsulko.com>
> Cc: Valentin Longchamp <valentin.longchamp at hitachi-powergrids.com>
> Cc: Vignesh Raghavendra <vigneshr at ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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