[PATCH 1/5] ARM: dts: at91: Add RSTC node

[Sergiu Moga]

Add node for RSTC.

Signed-off-by: Sergiu Moga <sergiu.moga at microchip.com>
---
 arch/arm/dts/sam9x60.dtsi | 6 ++++++
 arch/arm/dts/sama7g5.dtsi | 7 +++++++
 2 files changed, 13 insertions(+)

diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index be44519934..733cc5cec9 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -223,6 +223,12 @@
 				status = "okay";
 			};
 
+			reset_controller: rstc at fffffe00 {
+				compatible = "microchip,sam9x60-rstc";
+				reg = <0xfffffe00 0x10>;
+				clocks = <&clk32 0>;
+			};
+
 			pit: timer at fffffe40 {
 				compatible = "atmel,at91sam9260-pit";
 				reg = <0xfffffe40 0x10>;
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index b7c261ebe9..7015bd7f6d 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -232,6 +232,13 @@
 			clocks = <&clk32k 0>;
 		};
 
+		reset_controller: rstc at e001d000 {
+			compatible = "microchip,sama7g5-rstc", "microchip,sam9x60-rstc";
+			reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>;
+			#reset-cells = <1>;
+			clocks = <&clk32k 0>;
+		};
+
 		clk32k: clock-controller at e001d050 {
 			compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
 			reg = <0xe001d050 0x4>;
-- 
2.25.1