[PATCH v4 03/12] rockchip: tpl: change call condition rockchip_stimer_init()

[Johan Jonker]

The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently only rk3188 has an exception. Make this more
generic and call the function rockchip_stimer_init() only when
CONFIG_ROCKCHIP_STIMER_BASE is available.

Signed-off-by: Johan Jonker <jbx6244 at gmail.com>
Reviewed-by: Simon Glass <sjg at chromium.org>
---

Changed V3:
  use CONFIG_ROCKCHIP_STIMER

Changed V2:
  use IS_ENABLED
  add include kconfig.h
  move define location so that rockchip_stimer_init() is always
  visible to the compiler
---
 arch/arm/mach-rockchip/tpl.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 3c007bb450..2b561264a5 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -15,6 +15,7 @@
 #include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <linux/bitops.h>
+#include <linux/kconfig.h>
 
 #if CONFIG_IS_ENABLED(BANNER_PRINT)
 #include <timestamp.h>
@@ -29,6 +30,7 @@
 
 __weak void rockchip_stimer_init(void)
 {
+#if defined(CONFIG_ROCKCHIP_STIMER_BASE)
 	/* If Timer already enabled, don't re-init it */
 	u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
 
@@ -45,6 +47,7 @@ __weak void rockchip_stimer_init(void)
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
 	writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
 	       TIMER_CONTROL_REG);
+#endif
 }
 
 void board_init_f(ulong dummy)
@@ -74,7 +77,9 @@ void board_init_f(ulong dummy)
 	}
 
 	/* Init secure timer */
-	rockchip_stimer_init();
+	if (IS_ENABLED(CONFIG_ROCKCHIP_STIMER))
+		rockchip_stimer_init();
+
 	/* Init ARM arch timer in arch/arm/cpu/ */
 	timer_init();
 
-- 
2.20.1