[PATCH v4 08/12] rockchip: mmc: rockchip_dw_mmc: fix ciu clock index

Kever Yang kever.yang at rock-chips.com
Wed Apr 6 16:46:25 CEST 2022


On 2022/4/4 07:06, Johan Jonker wrote:
> The document rockchip-dw-mshc.yaml decribes a maximum of 4 clocks.
> In the rockchip_dw_mmc driver the clock name in use was "fixed"
> to "ciu" with index 1, but later reverted back to index 0.
> The clock drivers can handle both, but the calling driver
> should submit correct data as a standard practice.
> Fix the "ciu" clock index by setting it back to 1.
>
>    clock-names:
>      minItems: 2
>      items:
>        - const: biu
>        - const: ciu
>        - const: ciu-drive
>        - const: ciu-sample
>
> Signed-off-by: Johan Jonker <jbx6244 at gmail.com>


Reviewed-by: Kever Yang <kever.yang at rock-chips.com>


Thanks,
- Kever
> ---
>   drivers/mmc/rockchip_dw_mmc.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
> index 7f8dea1e34..be065ec0c3 100644
> --- a/drivers/mmc/rockchip_dw_mmc.c
> +++ b/drivers/mmc/rockchip_dw_mmc.c
> @@ -123,11 +123,11 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
>   	priv->minmax[0] = 400000;  /*  400 kHz */
>   	priv->minmax[1] = dtplat->max_frequency;
>   
> -	ret = clk_get_by_phandle(dev, dtplat->clocks, &priv->clk);
> +	ret = clk_get_by_phandle(dev, &dtplat->clocks[1], &priv->clk);
>   	if (ret < 0)
>   		return ret;
>   #else
> -	ret = clk_get_by_index(dev, 0, &priv->clk);
> +	ret = clk_get_by_index(dev, 1, &priv->clk);
>   	if (ret < 0)
>   		return ret;
>   #endif


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