[PATCH] arm: mvebu: Add support for reading LD0 and LD1 eFuse

[Pali Rohár]

On Wednesday 06 April 2022 21:21:59 Marek Behún wrote:
> On Wed,  6 Apr 2022 14:18:18 +0200
> Pali Rohár <pali at kernel.org> wrote:
> 
> > Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse
> > is used for secure boot and each line is 64 bits long + 1 lock bit. LD
> > eFuse lines are 256 bits long + 1 lock bit. LD 0 line is reserved for
> > Marvell Internal Use and LD 1 line is for General Purpose Data. U-Boot
> > already contains HD eFuse reading and programming support.
> > 
> > This patch implements LD eFuse reading support. LD 0 line is mapped to
> > U-Boot fuse bank 64 and LD 1 line to fuse bank 65.
> > 
> > LD 0 Marvell Internal Use line seems that was burned in factory with some
> > data and can be read by U-Boot fuse command:
> > 
> >   => fuse read 64 0 9  
> > 
> > LD 1 General Purpose Data line is by default empty and can be read by
> > U-Boot fuse command:
> > 
> >   => fuse read 65 0 9  
> > 
> > Signed-off-by: Pali Rohár <pali at kernel.org>
> 
> I am not sure whether this can be used safely on Turris Omnia - there
> was some issue with voltage or something, I know for sure that burning
> does not work on Omnia, but I am not sure if the issue also prevents
> stable reading.

On A385 there is errata only for programming OTP bits.

> Are the values you read always the same? Even across power cycles?
> 
> Marek

Reading is working fine and is stable also after power cycles. Marvell
Internal Use contains data which are same after more reads.