[PATCH] arm: dts: imx8mp: Import GPCv2 subset, HSIOMIX and USB PD
Tim Harvey
tharvey at gateworks.com
Mon Apr 11 20:51:39 CEST 2022
On Mon, Apr 11, 2022 at 11:33 AM Stefano Babic <sbabic at denx.de> wrote:
>
> Hi Marek,
>
> after bisecting, rather this breaks some boards like imx8mm_beacon (it
> is not the only one):
>
> +In file included from arch/arm/dts/.imx8mp-evk.dtb.pre.tmp:8:
>
> +arch/arm/dts/imx8mp.dtsi:7:10: fatal error:
> dt-bindings/power/imx8mp-power.h: No such file or directory
>
> + 7 | #include <dt-bindings/power/imx8mp-power.h>
>
> + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>
> +compilation terminated.
>
>
> Can you check and then repost ? Thanks !
>
> Best regards,
> Stefano
>
Stefano,
I think your missing "imx: power-domain: Add i.MX8MP support" [1]
There is quite a queue of imx patches that have been waiting for
review and merging and some have been broken due to Kconfig changes as
you're seeing now. Others depend on one another in this situation
here.
Is there any way you could review, merge to an imx-next, and issue a
pull-request to Tom periodically between releases instead of waiting
for the 1 merge window in between?
Best Regards,
Tim
Tim
[1] https://patchwork.ozlabs.org/project/uboot/patch/20220401011213.701459-1-marex@denx.de/
> On 01.04.22 16:54, Marek Vasut wrote:
> > Add DT bindings for a subset of GPCv2 which handles USB and PCIe PDs,
> > HSIOMIX PD controller and missing USB PD properties. This is required
> > to bring up the DWC3 USB controller up.
> >
> > This is based on linux next and patches which are still pending
> > review, but which are likely going to be part of Linux 5.19:
> > b2d67d7bdf74 ("arm64: dts: imx8mp: disable usb3_phy1")
> > 290918c72a29 ("arm64: dts: imx8mp: Add memory for USB3 glue layer to usb3 nodes")
> > https://www.spinics.net/lists/arm-kernel/msg958501.html
> >
> > Signed-off-by: Marek Vasut <marex at denx.de>
> > Cc: Fabio Estevam <festevam at gmail.com>
> > Cc: Peng Fan <peng.fan at nxp.com>
> > Cc: Stefano Babic <sbabic at denx.de>
> > ---
> > arch/arm/dts/imx8mp.dtsi | 72 ++++++++++++++++++++++++++++++++++++++--
> > 1 file changed, 70 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
> > index f9d64253c8a..79b65750da9 100644
> > --- a/arch/arm/dts/imx8mp.dtsi
> > +++ b/arch/arm/dts/imx8mp.dtsi
> > @@ -4,6 +4,7 @@
> > */
> >
> > #include <dt-bindings/clock/imx8mp-clock.h>
> > +#include <dt-bindings/power/imx8mp-power.h>
> > #include <dt-bindings/gpio/gpio.h>
> > #include <dt-bindings/input/input.h>
> > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > @@ -434,6 +435,44 @@
> > interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
> > #reset-cells = <1>;
> > };
> > +
> > + gpc: gpc at 303a0000 {
> > + compatible = "fsl,imx8mp-gpc";
> > + reg = <0x303a0000 0x1000>;
> > + interrupt-parent = <&gic>;
> > + interrupt-controller;
> > + #interrupt-cells = <3>;
> > +
> > + pgc {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + pgc_pcie_phy: power-domain at 1 {
> > + #power-domain-cells = <0>;
> > + reg = <IMX8MP_POWER_DOMAIN_PCIE_PHY>;
> > + };
> > +
> > + pgc_usb1_phy: power-domain at 2 {
> > + #power-domain-cells = <0>;
> > + reg = <IMX8MP_POWER_DOMAIN_USB1_PHY>;
> > + };
> > +
> > + pgc_usb2_phy: power-domain at 3 {
> > + #power-domain-cells = <0>;
> > + reg = <IMX8MP_POWER_DOMAIN_USB2_PHY>;
> > + };
> > +
> > + pgc_hsiomix: power-domains at 17 {
> > + #power-domain-cells = <0>;
> > + reg = <IMX8MP_POWER_DOMAIN_HSIOMIX>;
> > + clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
> > + <&clk IMX8MP_CLK_HSIO_ROOT>;
> > + assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
> > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
> > + assigned-clock-rates = <500000000>;
> > + };
> > + };
> > + };
> > };
> >
> > aips2: bus at 30400000 {
> > @@ -842,6 +881,28 @@
> > };
> > };
> >
> > + aips4: bus at 32c00000 {
> > + compatible = "fsl,aips-bus", "simple-bus";
> > + reg = <0x32c00000 0x400000>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + hsio_blk_ctrl: blk-ctrl at 32f10000 {
> > + compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
> > + reg = <0x32f10000 0x24>;
> > + clocks = <&clk IMX8MP_CLK_USB_ROOT>,
> > + <&clk IMX8MP_CLK_PCIE_ROOT>;
> > + clock-names = "usb", "pcie";
> > + power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>,
> > + <&pgc_usb1_phy>, <&pgc_usb2_phy>,
> > + <&pgc_hsiomix>, <&pgc_pcie_phy>;
> > + power-domain-names = "bus", "usb", "usb-phy1",
> > + "usb-phy2", "pcie", "pcie-phy";
> > + #power-domain-cells = <1>;
> > + };
> > + };
> > +
> > gic: interrupt-controller at 38800000 {
> > compatible = "arm,gic-v3";
> > reg = <0x38800000 0x10000>,
> > @@ -865,17 +926,20 @@
> > clock-names = "phy";
> > assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>;
> > assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
> > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB_PHY1>;
> > #phy-cells = <0>;
> > status = "disabled";
> > };
> >
> > usb3_0: usb at 32f10100 {
> > compatible = "fsl,imx8mp-dwc3";
> > - reg = <0x32f10100 0x8>;
> > + reg = <0x32f10100 0x8>,
> > + <0x381f0000 0x20>;
> > clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> > <&clk IMX8MP_CLK_USB_ROOT>;
> > clock-names = "hsio", "suspend";
> > interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
> > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
> > #address-cells = <1>;
> > #size-cells = <1>;
> > dma-ranges = <0x40000000 0x40000000 0xc0000000>;
> > @@ -907,16 +971,20 @@
> > clock-names = "phy";
> > assigned-clocks = <&clk IMX8MP_CLK_USB_PHY_REF>;
> > assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
> > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB_PHY2>;
> > #phy-cells = <0>;
> > + status = "disabled";
> > };
> >
> > usb3_1: usb at 32f10108 {
> > compatible = "fsl,imx8mp-dwc3";
> > - reg = <0x32f10108 0x8>;
> > + reg = <0x32f10108 0x8>,
> > + <0x382f0000 0x20>;
> > clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
> > <&clk IMX8MP_CLK_USB_ROOT>;
> > clock-names = "hsio", "suspend";
> > interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
> > + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB>;
> > #address-cells = <1>;
> > #size-cells = <1>;
> > dma-ranges = <0x40000000 0x40000000 0xc0000000>;
>
> --
> =====================================================================
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
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