[PATCH v2 04/23] imx8m: ddrphy_utils: Add 3732 MT/s mode
Marek Vasut
marex at denx.de
Mon Apr 11 21:45:24 CEST 2022
Add entry for 3732 MT/s mode of operation of the LPDDR4, in
which case the DDR PLL has to be configured in 933 MHz mode.
Reviewed-by: Fabio Estevam <festevam at denx.de>
Signed-off-by: Marek Vasut <marex at denx.de>
Cc: Fabio Estevam <festevam at denx.de>
Cc: Peng Fan <peng.fan at nxp.com>
Cc: Stefano Babic <sbabic at denx.de>
---
V2: Add RB by Fabio
---
drivers/ddr/imx/imx8m/ddrphy_utils.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c
index 0f8baefb1f8..a54449e5f14 100644
--- a/drivers/ddr/imx/imx8m/ddrphy_utils.c
+++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c
@@ -117,6 +117,10 @@ void ddrphy_init_set_dfi_clk(unsigned int drate)
dram_pll_init(MHZ(1000));
dram_disable_bypass();
break;
+ case 3732:
+ dram_pll_init(MHZ(933));
+ dram_disable_bypass();
+ break;
case 3200:
dram_pll_init(MHZ(800));
dram_disable_bypass();
--
2.35.1
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