[PATCH] gpio: aspeed: Fix incorrect offset of read back register.

[Ryan Chen]

> -----Original Message-----
> From: Billy Tsai <billy_tsai at aspeedtech.com>
> Sent: Wednesday, April 13, 2022 1:35 PM
> To: Ryan Chen <ryan_chen at aspeedtech.com>; ChiaWei Wang
> <chiawei_wang at aspeedtech.com>; BMC-SW <BMC-SW at aspeedtech.com>;
> andrew at aj.id.au; Billy Tsai <billy_tsai at aspeedtech.com>;
> u-boot at lists.denx.de
> Subject: [PATCH] gpio: aspeed: Fix incorrect offset of read back register.
> 
> The offset of the current read back register is the value of the gpio pin, not the
> value written for the gpio output.
> This patch fix it to avoid the other gpio output value controlled by the same
> register being set incorrectly.
> 
> Fixes: 7ad889b0f37a ("gpio: Add Aspeed GPIO driver")
> Signed-off-by: Billy Tsai <billy_tsai at aspeedtech.com>

Review-by: ryan_chen <ryan_chen at aspeedtech.com>

> ---
>  drivers/gpio/gpio-aspeed.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index
> a8a2afcb5c..2c5415c671 100644
> --- a/drivers/gpio/gpio-aspeed.c
> +++ b/drivers/gpio/gpio-aspeed.c
> @@ -211,7 +211,7 @@ static int aspeed_gpio_direction_output(struct udevice
> *dev, unsigned int offset
>  	struct aspeed_gpio_priv *priv = dev_get_priv(dev);
>  	const struct aspeed_gpio_bank *bank = to_bank(offset);
>  	u32 dir = readl(bank_reg(priv, bank, reg_dir));
> -	u32 output = readl(bank_reg(priv, bank, reg_val));
> +	u32 output = readl(bank_reg(priv, bank, reg_rdata));
> 
>  	dir |= GPIO_BIT(offset);
>  	writel(dir, bank_reg(priv, bank, reg_dir)); @@ -239,7 +239,7 @@
> aspeed_gpio_set_value(struct udevice *dev, unsigned int offset, int value)  {
>  	struct aspeed_gpio_priv *priv = dev_get_priv(dev);
>  	const struct aspeed_gpio_bank *bank = to_bank(offset);
> -	u32 data = readl(bank_reg(priv, bank, reg_val));
> +	u32 data = readl(bank_reg(priv, bank, reg_rdata));
> 
>  	if (value)
>  		data |= GPIO_BIT(offset);
> --
> 2.25.1