[PATCH 1/5] clk: meson: add minimal driver for axg-ao clocks

Sean Anderson seanga2 at gmail.com
Fri Apr 22 02:10:55 CEST 2022


On 4/21/22 1:57 AM, Vyacheslav wrote:
> 20.04.2022 23:12, Sean Anderson пишет:
>> On 4/20/22 1:54 PM, Vyacheslav Bocharov wrote:
>>> Add minimal driver AO clocks on meson AXG family. Only ADC related clocks
>>> are supported.
>>>
>>> Signed-off-by: Vyacheslav Bocharov <adeep at lexina.in>
>>> ---
>>>   drivers/clk/meson/Makefile |  1 +
>>>   drivers/clk/meson/axg-ao.c | 83 ++++++++++++++++++++++++++++++++++++++
>>>   2 files changed, 84 insertions(+)
>>>   create mode 100644 drivers/clk/meson/axg-ao.c
>>>
>>> diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
>>> index b9c6bd66cf..a486b13e9c 100644
>>> --- a/drivers/clk/meson/Makefile
>>> +++ b/drivers/clk/meson/Makefile
>>> @@ -5,5 +5,6 @@
>>>   obj-$(CONFIG_CLK_MESON_GX) += gxbb.o
>>>   obj-$(CONFIG_CLK_MESON_AXG) += axg.o
>>> +obj-$(CONFIG_CLK_MESON_AXG) += axg-ao.o
>>>   obj-$(CONFIG_CLK_MESON_G12A) += g12a.o
>>>   obj-$(CONFIG_CLK_MESON_G12A) += g12a-ao.o
>>> diff --git a/drivers/clk/meson/axg-ao.c b/drivers/clk/meson/axg-ao.c
>>> new file mode 100644
>>> index 0000000000..264ec6f0d3
>>> --- /dev/null
>>> +++ b/drivers/clk/meson/axg-ao.c
>>> @@ -0,0 +1,83 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +
>>> +#include <common.h>
>>> +#include <log.h>
>>> +#include <asm/io.h>
>>> +#include <clk-uclass.h>
>>> +#include <dm.h>
>>> +#include <regmap.h>
>>> +#include <syscon.h>
>>> +#include <dt-bindings/clock/axg-aoclkc.h>
>>> +
>>> +#include "clk_meson.h"
>>> +
>>> +struct meson_clk {
>>> +    struct regmap *map;
>>> +};
>>> +
>>> +#define AO_CLK_GATE0        0x40
>>> +#define AO_SAR_CLK        0x90
>>> +
>>> +static struct meson_gate gates[] = {
>>> +    MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 7),
>>> +    MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 7),
>>> +};
>>> +
>>> +static int meson_set_gate(struct clk *clk, bool on)
>>> +{
>>> +    struct meson_clk *priv = dev_get_priv(clk->dev);
>>> +    struct meson_gate *gate;
>>> +
>>> +    if (clk->id >= ARRAY_SIZE(gates))
>>> +        return -ENOENT;
>> Do this check in request().
> 
> Do you mean remove this check from meson_set_gate and add request function like this:
> 
> static int meson_clk_request(struct clk *clk)
> {
>      struct npcm_clk_priv *priv = dev_get_priv(clk->dev);
> 
>      if (clk->id >= ARRAY_SIZE(gates))
>          return -ENOENT;
> 
>      return 0;
> }
> 
> static struct clk_ops meson_clk_ops = {
>      .disable    = meson_clk_disable,
>      .enable        = meson_clk_enable,
>      .request    = meson_clk_request,
> };

Yes.

--Sean

>>
>>> +    gate = &gates[clk->id];
>>> +
>>> +    if (gate->reg == 0)
>>> +        return 0;
>>> +
>>> +    regmap_update_bits(priv->map, gate->reg,
>>> +               BIT(gate->bit), on ? BIT(gate->bit) : 0);
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static int meson_clk_enable(struct clk *clk)
>>> +{
>>> +    return meson_set_gate(clk, true);
>>> +}
>>> +
>>> +static int meson_clk_disable(struct clk *clk)
>>> +{
>>> +    return meson_set_gate(clk, false);
>>> +}
>>> +
>>> +static int meson_clk_probe(struct udevice *dev)
>>> +{
>>> +    struct meson_clk *priv = dev_get_priv(dev);
>>> +
>>> +    priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
>>> +    if (IS_ERR(priv->map))
>>> +        return PTR_ERR(priv->map);
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static struct clk_ops meson_clk_ops = {
>>> +    .disable    = meson_clk_disable,
>>> +    .enable        = meson_clk_enable,
>>> +};
>>> +
>>> +static const struct udevice_id meson_clk_ids[] = {
>>> +    { .compatible = "amlogic,meson-axg-aoclkc" },
>>> +    { }
>>> +};
>>> +
>>> +U_BOOT_DRIVER(meson_clk_axg_ao) = {
>>> +    .name        = "meson_clk_axg_ao",
>>> +    .id        = UCLASS_CLK,
>>> +    .of_match    = meson_clk_ids,
>>> +    .priv_auto    = sizeof(struct meson_clk),
>>> +    .ops        = &meson_clk_ops,
>>> +    .probe        = meson_clk_probe,
>>> +};
>>>
>>
>> Otherwise LGTM
> 
> Thanks
> 
>> --Sean
> 




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