[PATCH] net: marvell: mvgbe: Set PHY page 0 before phy_connect

[Stefan Roese]

Hi Tony,

On 4/21/22 23:21, Tony Dinh wrote:

<snip>

>> What really puzzles me is, why the page address is set to a non-zero
>> value at all at this early boot stage? Could you perhaps add some
>> debugging code, to check, if and where the page address gets set?
>> I find it hard to belief, that this starts with non-zero after
>> powering up the device / PHY.
>>
>> Or did I miss something?
> 
> Other Kirkwood boards behave correctly (such as the Sheevaplug,
> Dreamplug, and Dell Kace M300). The Page Select register (22) contains
> 0 in these boards, and all have PHY id 1410e90.  The NSA310s also has
> PHY id 1410e90.

Yes. I'm pretty sure that the page select register is set to 0 upon
PHY startup. Even though there might be some strapping possibilities
to configure some PHY registers, the page select is most likely always
0 after power-up. So if nobody writes to this reg, then is should be 0.

> But I could not find in the uclass MVGBE where the Page Select
> register is set before phy_connect is called. So my guess is that
> memory location just happens to be zero in other boards but not in
> this NSA310S board. Perhaps the memory location needs to be set to
> zero, to make sure all registers point to page 0 in the beginning.

Please see above.

> Possibly, it is here that the Page Select register should be zero out
> after the priv data is copied:  dev_get_priv(). mvgbe_of_to_plat() is
> called very early on (during the uclass MVGBE creation).
> 
> static int mvgbe_of_to_plat(struct udevice *dev)
> {
> struct eth_pdata *pdata = dev_get_plat(dev);
> struct mvgbe_device *dmvgbe = dev_get_priv(dev);

Possibly. Again my suggestion is to add some debug code to check at
different boot times, which value is currently set in the page select
register. By just reading is out and printing it's value. You might need
to add some "special code" at the early code paths, as the MDIO driver
is not started there.

Another idea is, if it's possible to issue a HW-reset to the PHY on the
NSA310 board. Do you know if some GPIO is connected to the PHY's reset
pin which could be toggled by the SoC?

Note: We could of course just add the reset to 0 as you have done in the
MAC driver or some board specific code. But I really would like to
understand why the page select reg is non-zero in this case.

Thanks,
Stefan