[PATCH 03/10] microblaze: cache: improve dcache Kconfig options
Michal Simek
michal.simek at xilinx.com
Fri Apr 22 14:47:04 CEST 2022
On 4/11/22 18:26, Ovidiu Panait wrote:
> Replace CONFIG_DCACHE with a Kconfig option more limited in scope -
> XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports
> the "wdc" (Write to Data Cache) instruction. It will be used to guard
> "wdc" invocations in microblaze cache code.
>
> Also, drop all ifdefs around flush_cache() calls and only keep one
> CONFIG_IS_ENABLED() guard within flush_cache() itself.
>
> Signed-off-by: Ovidiu Panait <ovpanait at gmail.com>
> ---
>
> arch/microblaze/Kconfig | 4 ----
> arch/microblaze/cpu/cache.c | 15 ++++++++++-----
> arch/microblaze/lib/bootm.c | 2 --
> board/xilinx/microblaze-generic/Kconfig | 7 +++++++
> 4 files changed, 17 insertions(+), 11 deletions(-)
>
> diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
> index d7d1b21970..5a2e91104f 100644
> --- a/arch/microblaze/Kconfig
> +++ b/arch/microblaze/Kconfig
> @@ -25,10 +25,6 @@ config TARGET_MICROBLAZE_GENERIC
>
> endchoice
>
> -config DCACHE
> - bool "Enable dcache support"
> - default y
> -
> config ICACHE
> bool "Enable icache support"
> default y
> diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c
> index b6126de194..4e8e228a22 100644
> --- a/arch/microblaze/cpu/cache.c
> +++ b/arch/microblaze/cpu/cache.c
> @@ -49,26 +49,31 @@ void dcache_enable(void)
>
> void dcache_disable(void)
> {
> -#ifdef CONFIG_DCACHE
> flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
> -#endif
> +
> MSRCLR(0x80);
> }
>
> void flush_cache(ulong addr, ulong size)
> {
> int i;
> - for (i = 0; i < size; i += 4)
> + for (i = 0; i < size; i += 4) {
> asm volatile (
> #ifdef CONFIG_ICACHE
> "wic %0, r0;"
> #endif
> "nop;"
> -#ifdef CONFIG_DCACHE
> + :
> + : "r" (addr + i)
> + : "memory");
> +
> + if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) {
Based on buildman your patch is removing cache handling from SPL.
Here is what I see that there are missing 2 instructions. And 4/10 you see that
8 instructions are missing.
06: microblaze: cache: improve dcache Kconfig options
microblaze: (for 1/1 boards) spl/u-boot-spl:all -8.0 spl/u-boot-spl:text -8.0
microblaze-generic: spl/u-boot-spl:all -8 spl/u-boot-spl:text -8
spl-u-boot-spl: add: 0/0, grow: 0/-1 bytes: 0/-8 (-8)
function old new delta
flush_cache 48 40 -8
07: microblaze: cache: improve icache Kconfig options
microblaze: (for 1/1 boards) spl/u-boot-spl:all -32.0 spl/u-boot-spl:text -32.0
microblaze-generic: spl/u-boot-spl:all -32 spl/u-boot-spl:text -32
spl-u-boot-spl: add: 0/0, grow: 0/-1 bytes: 0/-32 (-32)
function
This is going to macro explanation where it is clear that you don't define
CONFIG_SPL_FOO you only define CONFIG_FOO.
104 * CONFIG_IS_ENABLED(FOO) expands to
105 * 1 if USE_HOSTCC is defined and CONFIG_TOOLS_FOO is set to 'y',
106 * 1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y',
107 * 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y',
108 * 1 if CONFIG_TPL_BUILD is defined and CONFIG_TPL_FOO is set to 'y',
109 * 0 otherwise.
It means you should use different macro or create one more with SPL.
Thanks,
Michal
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