[PATCH 1/5] doc: dtbinding: Add doc for privilege regs settings

Jit Loon Lim jit.loon.lim at intel.com
Mon Dec 5 14:42:15 CET 2022


From: Tien Fong Chee <tien.fong.chee at intel.com>

Add a document to describe firewall and privilege register settings binding
information.

Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim at intel.com>
---
 .../misc/socfpga_secreg.txt                   | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 doc/device-tree-bindings/misc/socfpga_secreg.txt

diff --git a/doc/device-tree-bindings/misc/socfpga_secreg.txt b/doc/device-tree-bindings/misc/socfpga_secreg.txt
new file mode 100644
index 0000000000..66df51f613
--- /dev/null
+++ b/doc/device-tree-bindings/misc/socfpga_secreg.txt
@@ -0,0 +1,26 @@
+* Firewall and privilege register settings in device tree
+
+Required properties:
+--------------------
+
+- compatible: should contain "intel,socfpga-secreg"
+- intel,offset-settings: 32-bit offset address of block register, and then
+						 followed by 32-bit value settings.
+
+Example:
+--------
+
+		socfpga_secreg: socfpga-secreg {
+			compatible = "intel,socfpga-secreg";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			u-boot,dm-pre-reloc;
+
+			i_sys_mgr at ffd12000 {
+				reg = <0xffd12000 0x00000228>;
+				intel,offset-settings =
+					<0x00000020 0xff010000>,
+					<0x00000024 0xffffffff>;
+				u-boot,dm-pre-reloc;
+			};
+		};
-- 
2.26.2



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