[RFC PATCH 02/17] sunxi: remove CONFIG_MACPWR

Andre Przywara andre.przywara at arm.com
Wed Dec 14 15:23:03 CET 2022


On Wed, 14 Dec 2022 03:09:22 -0600
Samuel Holland <samuel at sholland.org> wrote:

Hi Samuel,

> Thanks for this cleanup! With the two issues below addressed, it looks
> good to me.

many thanks for having such a thorough look!

> On 12/5/22 18:45, Andre Przywara wrote:
> > The CONFIG_MACPWR Kconfig symbol is used to point to a GPIO that enables
> > the power for the Ethernet "MAC" (mostly PHY, really).
> > In the DT this is described with the phy-supply property in the MAC DT
> > node, pointing to a (GPIO controlled) regulator. Since we need Ethernet
> > only in U-Boot proper, and use a DM driver there, we should use the DT
> > instead of hardcoding this.
> > 
> > Add code to the sun8i_emac and sunxi_emac drivers to check the DT for
> > that regulator and enable it, at probe time. Then drop the current code
> > from board.c, which was doing that job before.
> > This allows us to remove the MACPWR Kconfig definition and the respective
> > values from the defconfigs.  
> 
> ... and we don't care about sun7i-gmac here because there's no U-Boot
> driver for it, and the Linux driver already uses the devicetree.

If you mean the Gigabit MAC on the A20 (allwinner,sun7i-a20-gmac), that's
implemented in drivers/net/designware.c. And this code already parses
phy-supply. I think I tried it on my BananaPi, but can double check.

> 
> > Signed-off-by: Andre Przywara <andre.przywara at arm.com>
> > ---
> >  arch/arm/mach-sunxi/Kconfig           |  7 -------
> >  board/sunxi/board.c                   | 10 ----------
> >  configs/Bananapi_M2_Ultra_defconfig   |  1 -
> >  configs/Bananapi_defconfig            |  1 -
> >  configs/Bananapro_defconfig           |  1 -
> >  configs/Lamobo_R1_defconfig           |  1 -
> >  configs/Mele_A1000_defconfig          |  1 -
> >  configs/Orangepi_defconfig            |  1 -
> >  configs/Orangepi_mini_defconfig       |  1 -
> >  configs/bananapi_m1_plus_defconfig    |  1 -
> >  configs/bananapi_m2_plus_h3_defconfig |  1 -
> >  configs/bananapi_m2_plus_h5_defconfig |  1 -
> >  configs/i12-tvbox_defconfig           |  1 -
> >  configs/jesurun_q5_defconfig          |  1 -
> >  configs/mixtile_loftq_defconfig       |  1 -
> >  configs/nanopi_m1_plus_defconfig      |  1 -
> >  configs/nanopi_neo_plus2_defconfig    |  1 -
> >  configs/nanopi_r1s_h5_defconfig       |  1 -
> >  configs/orangepi_pc2_defconfig        |  1 -
> >  configs/orangepi_plus2e_defconfig     |  1 -
> >  configs/orangepi_plus_defconfig       |  1 -
> >  configs/orangepi_win_defconfig        |  1 -
> >  configs/pine_h64_defconfig            |  1 -
> >  configs/zeropi_defconfig              |  1 -
> >  drivers/net/sun8i_emac.c              |  9 +++++++--
> >  drivers/net/sunxi_emac.c              | 10 ++++++++--
> >  26 files changed, 15 insertions(+), 43 deletions(-)
> > 
> > diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> > index 5f95fe72d08..6220175d612 100644
> > --- a/arch/arm/mach-sunxi/Kconfig
> > +++ b/arch/arm/mach-sunxi/Kconfig
> > @@ -645,13 +645,6 @@ config OLD_SUNXI_KERNEL_COMPAT
> >  	Set this to enable various workarounds for old kernels, this results in
> >  	sub-optimal settings for newer kernels, only enable if needed.
> >  
> > -config MACPWR
> > -	string "MAC power pin"
> > -	default ""
> > -	help
> > -	  Set the pin used to power the MAC. This takes a string in the format
> > -	  understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
> > -
> >  config MMC0_CD_PIN
> >  	string "Card detect pin for mmc0"
> >  	default "PF6" if MACH_SUN8I_A83T || MACH_SUNXI_H3_H5 || MACH_SUN50I
> > diff --git a/board/sunxi/board.c b/board/sunxi/board.c
> > index ec35a7f06bd..3077cc71ebd 100644
> > --- a/board/sunxi/board.c
> > +++ b/board/sunxi/board.c
> > @@ -228,15 +228,6 @@ int board_init(void)
> >  	if (ret)
> >  		return ret;
> >  
> > -	/* strcmp() would look better, but doesn't get optimised away. */
> > -	if (CONFIG_MACPWR[0]) {
> > -		macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR);
> > -		if (macpwr_pin >= 0) {
> > -			gpio_request(macpwr_pin, "macpwr");
> > -			gpio_direction_output(macpwr_pin, 1);
> > -		}
> > -	}
> > -
> >  #if CONFIG_IS_ENABLED(DM_I2C)
> >  	/*
> >  	 * Temporary workaround for enabling I2C clocks until proper sunxi DM
> > @@ -244,7 +235,6 @@ int board_init(void)
> >  	 */
> >  	i2c_init_board();
> >  #endif
> > -
> >  	eth_init_board();
> >  
> >  	return 0;
> > diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
> > index 0bd163afdd7..1c4b90ab9d2 100644
> > --- a/configs/Bananapi_M2_Ultra_defconfig
> > +++ b/configs/Bananapi_M2_Ultra_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN8I_R40=y
> >  CONFIG_DRAM_CLK=576
> > -CONFIG_MACPWR="PA17"  
> 
> This GPIO is actually the PHY reset line, not its power supply. Since
> that line has a pull up, I don't think this was necessary to begin with.

Ha, good find. Indeed the schematic confirms that. And the BPi M2 Berry
uses the same connection, but doesn't mention PA17 at all (neither in the
defconfig nor in the DT). I don't have a M2U, but will play around with my
M2 Berry, to simulate that.

> >  CONFIG_MMC0_CD_PIN="PH13"
> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> >  CONFIG_USB1_VBUS_PIN="PH23"
> > diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
> > index 2814d77c187..2a590e141d9 100644
> > --- a/configs/Bananapi_defconfig
> > +++ b/configs/Bananapi_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN7I=y
> >  CONFIG_DRAM_CLK=432
> > -CONFIG_MACPWR="PH23"
> >  CONFIG_VIDEO_COMPOSITE=y
> >  CONFIG_GMAC_TX_DELAY=3
> >  CONFIG_AHCI=y
> > diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
> > index 11375991c81..4b56195d4f2 100644
> > --- a/configs/Bananapro_defconfig
> > +++ b/configs/Bananapro_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN7I=y
> >  CONFIG_DRAM_CLK=432
> > -CONFIG_MACPWR="PH23"
> >  CONFIG_USB1_VBUS_PIN="PH0"
> >  CONFIG_USB2_VBUS_PIN="PH1"
> >  CONFIG_VIDEO_COMPOSITE=y
> > diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
> > index d51601ff10f..fc63a7fbd46 100644
> > --- a/configs/Lamobo_R1_defconfig
> > +++ b/configs/Lamobo_R1_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN7I=y
> >  CONFIG_DRAM_CLK=432
> > -CONFIG_MACPWR="PH23"
> >  CONFIG_MMC0_CD_PIN="PH10"
> >  CONFIG_GMAC_TX_DELAY=4
> >  CONFIG_AHCI=y
> > diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig
> > index 3424b976772..a407550f6bd 100644
> > --- a/configs/Mele_A1000_defconfig
> > +++ b/configs/Mele_A1000_defconfig
> > @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y
> >  CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN4I=y
> > -CONFIG_MACPWR="PH15"
> >  CONFIG_VIDEO_VGA=y
> >  CONFIG_VIDEO_COMPOSITE=y
> >  CONFIG_AHCI=y
> > diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
> > index b4d5feff309..5c14e327e39 100644
> > --- a/configs/Orangepi_defconfig
> > +++ b/configs/Orangepi_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN7I=y
> >  CONFIG_DRAM_CLK=432
> > -CONFIG_MACPWR="PH23"
> >  CONFIG_USB1_VBUS_PIN="PH26"
> >  CONFIG_USB2_VBUS_PIN="PH22"
> >  CONFIG_VIDEO_VGA=y
> > diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
> > index 43197381114..fdacf0cd123 100644
> > --- a/configs/Orangepi_mini_defconfig
> > +++ b/configs/Orangepi_mini_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN7I=y
> >  CONFIG_DRAM_CLK=432
> > -CONFIG_MACPWR="PH23"
> >  CONFIG_MMC0_CD_PIN="PH10"
> >  CONFIG_MMC3_CD_PIN="PH11"
> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=3
> > diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig
> > index 12ea6a3236a..f398c70ce1a 100644
> > --- a/configs/bananapi_m1_plus_defconfig
> > +++ b/configs/bananapi_m1_plus_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN7I=y
> >  CONFIG_DRAM_CLK=432
> > -CONFIG_MACPWR="PH23"
> >  CONFIG_VIDEO_COMPOSITE=y
> >  CONFIG_GMAC_TX_DELAY=3
> >  CONFIG_AHCI=y
> > diff --git a/configs/bananapi_m2_plus_h3_defconfig b/configs/bananapi_m2_plus_h3_defconfig
> > index 2bd5a70a2d0..ab138a43060 100644
> > --- a/configs/bananapi_m2_plus_h3_defconfig
> > +++ b/configs/bananapi_m2_plus_h3_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN8I_H3=y
> >  CONFIG_DRAM_CLK=672
> > -CONFIG_MACPWR="PD6"
> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> >  CONFIG_SYS_MONITOR_LEN=786432
> > diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig
> > index 926cf6f5a4d..29200e53585 100644
> > --- a/configs/bananapi_m2_plus_h5_defconfig
> > +++ b/configs/bananapi_m2_plus_h5_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-bananapi-m2-plus"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN50I_H5=y
> >  CONFIG_DRAM_CLK=672
> > -CONFIG_MACPWR="PD6"
> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> >  CONFIG_SYS_MONITOR_LEN=786432
> > diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig
> > index d75a7992a82..11971a8a766 100644
> > --- a/configs/i12-tvbox_defconfig
> > +++ b/configs/i12-tvbox_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN7I=y
> >  CONFIG_DRAM_CLK=384
> > -CONFIG_MACPWR="PH21"
> >  CONFIG_VIDEO_COMPOSITE=y
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> >  CONFIG_SYS_MONITOR_LEN=786432
> > diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig
> > index 2e6b045b549..701d8ecfaa8 100644
> > --- a/configs/jesurun_q5_defconfig
> > +++ b/configs/jesurun_q5_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN4I=y
> >  CONFIG_DRAM_CLK=312
> > -CONFIG_MACPWR="PH19"
> >  CONFIG_USB0_VBUS_PIN="PB9"
> >  CONFIG_VIDEO_COMPOSITE=y
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> > diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig
> > index 646594b6e07..cdee80b3566 100644
> > --- a/configs/mixtile_loftq_defconfig
> > +++ b/configs/mixtile_loftq_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN6I=y
> >  CONFIG_DRAM_ZQ=251
> > -CONFIG_MACPWR="PA21"  
> 
> This board does not have a regulator in its devicetree.

Yeah, that's an odd one, as the DT only exists in the U-Boot tree. So we
could just add it. I guess given the age and "support status" of this
board no one would care anyways ;-)

> I verified the rest of the boards have an equivalent GPIO-controlled
> fixed regulator in their devicetrees.

Oh, many thanks!

> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> >  CONFIG_USB1_VBUS_PIN="PH24"
> >  CONFIG_USB2_VBUS_PIN=""
> > diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig
> > index 89065f0411a..a3b82de4de6 100644
> > --- a/configs/nanopi_m1_plus_defconfig
> > +++ b/configs/nanopi_m1_plus_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1-plus"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN8I_H3=y
> >  CONFIG_DRAM_CLK=408
> > -CONFIG_MACPWR="PD6"
> >  CONFIG_MMC0_CD_PIN="PH13"
> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> > diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig
> > index d462b63e944..f7e3efdfe5e 100644
> > --- a/configs/nanopi_neo_plus2_defconfig
> > +++ b/configs/nanopi_neo_plus2_defconfig
> > @@ -6,7 +6,6 @@ CONFIG_MACH_SUN50I_H5=y
> >  CONFIG_DRAM_CLK=408
> >  CONFIG_DRAM_ZQ=3881977
> >  # CONFIG_DRAM_ODT_EN is not set
> > -CONFIG_MACPWR="PD6"
> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> >  CONFIG_SYS_MONITOR_LEN=786432
> > diff --git a/configs/nanopi_r1s_h5_defconfig b/configs/nanopi_r1s_h5_defconfig
> > index 5c332ca5261..760dfe37022 100644
> > --- a/configs/nanopi_r1s_h5_defconfig
> > +++ b/configs/nanopi_r1s_h5_defconfig
> > @@ -6,7 +6,6 @@ CONFIG_MACH_SUN50I_H5=y
> >  CONFIG_DRAM_CLK=672
> >  CONFIG_DRAM_ZQ=3881977
> >  # CONFIG_DRAM_ODT_EN is not set
> > -CONFIG_MACPWR="PD6"
> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> >  CONFIG_SYS_MONITOR_LEN=786432
> > diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
> > index 356ae7ce476..cf75cf4b351 100644
> > --- a/configs/orangepi_pc2_defconfig
> > +++ b/configs/orangepi_pc2_defconfig
> > @@ -5,7 +5,6 @@ CONFIG_SPL=y
> >  CONFIG_MACH_SUN50I_H5=y
> >  CONFIG_DRAM_CLK=672
> >  CONFIG_DRAM_ZQ=3881977
> > -CONFIG_MACPWR="PD6"
> >  CONFIG_SPL_SPI_SUNXI=y
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> >  CONFIG_SYS_MONITOR_LEN=786432
> > diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig
> > index e27b329b0a9..c72adfb3e69 100644
> > --- a/configs/orangepi_plus2e_defconfig
> > +++ b/configs/orangepi_plus2e_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN8I_H3=y
> >  CONFIG_DRAM_CLK=672
> > -CONFIG_MACPWR="PD6"
> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> >  CONFIG_SYS_MONITOR_LEN=786432
> > diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
> > index f4ce4851d7c..c407af38bcc 100644
> > --- a/configs/orangepi_plus_defconfig
> > +++ b/configs/orangepi_plus_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN8I_H3=y
> >  CONFIG_DRAM_CLK=672
> > -CONFIG_MACPWR="PD6"
> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> >  CONFIG_USB1_VBUS_PIN="PG13"
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> > diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig
> > index 1e26970230f..b803dcd01ef 100644
> > --- a/configs/orangepi_win_defconfig
> > +++ b/configs/orangepi_win_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN50I=y
> >  CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
> > -CONFIG_MACPWR="PD14"
> >  CONFIG_SPL_SPI_SUNXI=y
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> >  CONFIG_SYS_MONITOR_LEN=786432
> > diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig
> > index 578bd92f6a3..0b482dcea24 100644
> > --- a/configs/pine_h64_defconfig
> > +++ b/configs/pine_h64_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN50I_H6=y
> >  CONFIG_SUNXI_DRAM_H6_LPDDR3=y
> > -CONFIG_MACPWR="PC16"
> >  CONFIG_MMC0_CD_PIN="PF6"
> >  CONFIG_MMC_SUNXI_SLOT_EXTRA=2
> >  CONFIG_USB3_VBUS_PIN="PL5"
> > diff --git a/configs/zeropi_defconfig b/configs/zeropi_defconfig
> > index 8365da2c472..7ace1b5cbfd 100644
> > --- a/configs/zeropi_defconfig
> > +++ b/configs/zeropi_defconfig
> > @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-zeropi"
> >  CONFIG_SPL=y
> >  CONFIG_MACH_SUN8I_H3=y
> >  CONFIG_DRAM_CLK=408
> > -CONFIG_MACPWR="PD6"
> >  # CONFIG_VIDEO_DE2 is not set
> >  # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> >  CONFIG_SYS_MONITOR_LEN=786432
> > diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
> > index 9cca8fa4e0a..c7087b7302d 100644
> > --- a/drivers/net/sun8i_emac.c
> > +++ b/drivers/net/sun8i_emac.c
> > @@ -29,6 +29,7 @@
> >  #include <net.h>
> >  #include <reset.h>
> >  #include <wait_bit.h>
> > +#include <power/regulator.h>
> >  
> >  #define MDIO_CMD_MII_BUSY		BIT(0)
> >  #define MDIO_CMD_MII_WRITE		BIT(1)
> > @@ -169,9 +170,8 @@ struct emac_eth_dev {
> >  	struct clk ephy_clk;
> >  	struct reset_ctl tx_rst;
> >  	struct reset_ctl ephy_rst;
> > -#if CONFIG_IS_ENABLED(DM_GPIO)
> >  	struct gpio_desc reset_gpio;
> > -#endif
> > +	struct udevice *phy_reg;
> >  };
> >  
> >  
> > @@ -738,6 +738,9 @@ static int sun8i_emac_eth_probe(struct udevice *dev)
> >  
> >  	sun8i_emac_set_syscon(sun8i_pdata, priv);
> >  
> > +	if (priv->phy_reg)
> > +		regulator_set_enable(priv->phy_reg, true);
> > +
> >  	sun8i_mdio_init(dev->name, dev);
> >  	priv->bus = miiphy_get_dev_by_name(dev->name);
> >  
> > @@ -844,6 +847,8 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev)
> >  		return -EINVAL;
> >  	}
> >  
> > +	device_get_supply_regulator(dev, "phy-supply", &priv->phy_reg);
> > +
> >  	pdata->phy_interface = -1;
> >  	priv->phyaddr = -1;
> >  	priv->use_internal_phy = false;
> > diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_emac.c
> > index 8625e49dae4..ee8b8a1667d 100644
> > --- a/drivers/net/sunxi_emac.c
> > +++ b/drivers/net/sunxi_emac.c
> > @@ -17,6 +17,7 @@
> >  #include <net.h>
> >  #include <asm/io.h>
> >  #include <asm/arch/clock.h>
> > +#include <power/regulator.h>
> >  
> >  /* EMAC register  */
> >  struct emac_regs {
> > @@ -164,9 +165,8 @@ struct emac_eth_dev {
> >  	struct mii_dev *bus;
> >  	struct phy_device *phydev;
> >  	int link_printed;
> > -#ifdef CONFIG_DM_ETH
> >  	uchar rx_buf[EMAC_RX_BUFSIZE];
> > -#endif
> > +	struct udevice *phy_reg;
> >  };
> >  
> >  struct emac_rxhdr {
> > @@ -575,6 +575,9 @@ static int sunxi_emac_eth_probe(struct udevice *dev)
> >  	if (ret)
> >  		return ret;
> >  
> > +	if (priv->phy_reg)
> > +		regulator_set_enable(priv->phy_reg, true);
> > +
> >  	return sunxi_emac_init_phy(priv, dev);
> >  }
> >  
> > @@ -588,9 +591,12 @@ static const struct eth_ops sunxi_emac_eth_ops = {
> >  static int sunxi_emac_eth_of_to_plat(struct udevice *dev)
> >  {
> >  	struct eth_pdata *pdata = dev_get_plat(dev);
> > +	struct emac_eth_dev *priv = dev_get_priv(dev);
> >  
> >  	pdata->iobase = dev_read_addr(dev);
> >  
> > +	device_get_supply_regulator(dev, "phy-supply", &priv->phy_reg);  
> 
> For sun4i-emac, the phy-supply property is actually part of the mdio
> node, not the emac node.

Huh, right. As far as I can tell, this only affects two boards, Mele_A1000
and jesurun_q5, which I don't have.
So can we follow the link to the PHY node, then go to its parent, which
should be the MDIO node? And pick the regulator from there?

Cheers,
Andre

> Regards,
> Samuel
> 
> > +
> >  	return 0;
> >  }
> >    
> 



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