[PATCH 16/20] imx8ulp: clock: Handle the DDRLOCKED when setting DDR clock

sbabic at denx.de sbabic at denx.de
Sat Feb 5 17:43:15 CET 2022


> From: Ye Li <ye.li at nxp.com>
> The DDRLOCKED bit in CGC2 DDRCLK will auto lock up and down by HW
> according to DDR DIV updating or DDR CLK halt status change. So DDR
> PCC disable/enable will trigger the lock up/down flow. We
> need wait until unlock to ensure clock is ready.
> And before configuring the DDRCLK DIV, we need polling the DDRLOCKED
> until it is unlocked. Otherwise writing ti DIV bits will not set.
> Reviewed-by: Peng Fan <peng.fan at nxp.com>
> Signed-off-by: Ye Li <ye.li at nxp.com>
> Signed-off-by: Peng Fan <peng.fan at nxp.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

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