[PATCH v2 17/25] phy: cadence: Sierra: Add PHY PCS common register configurations

[Tom Rini]

On Fri, Jan 28, 2022 at 01:41:44PM +0530, Aswath Govindraju wrote:

> From: Swapnil Jakhade <sjakhade at cadence.com>
> 
> Add PHY PCS common register configuration sequences for single link.
> Update single link PCIe register sequence accordingly.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade at cadence.com>
> Signed-off-by: Aswath Govindraju <a-govindraju at ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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