[PATCH] arm: kirkwood: Dreamplug : Use Marvell uclass mvgbe and PHY driver for Ethernet
Stefan Roese
sr at denx.de
Thu Feb 10 09:18:11 CET 2022
On 1/31/22 00:02, Tony Dinh wrote:
> The Globalscale Technologies Dreamplug board has the network chip
> Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
> driver to bring up Ethernet.
>
> - Currently, CONFIG_RESET_PHY_R symbol is used in
> arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
> boards with mv8831116 PHY, with each board defines the function
> reset_phy(). Undefine it for this board.
> - Add board_eth_init() to use uclass mvgbe to bring up both network
> port 0 and 1. And remove ad-hoc code.
> - Enable CONFIG_PHY_MARVELL to properly configure the network.
> - Add myself as maintainer (this board seems to be orphaned,
> could not contact Jason Cooper using current email).
> - Miscellaneous changes: Move constants to .c file and remove header file
> board/Marvell/dreamplug/dreamplug.h, cleanup comments.
>
> Signed-off-by: Tony Dinh <mibodhi at gmail.com>
Applied to u-boot-marvell/master
Thanks,
Stefan
> ---
>
> board/Marvell/dreamplug/MAINTAINERS | 1 +
> board/Marvell/dreamplug/dreamplug.c | 94 +++++------------------------
> board/Marvell/dreamplug/dreamplug.h | 25 --------
> configs/dreamplug_defconfig | 1 +
> include/configs/dreamplug.h | 20 ++----
> 5 files changed, 21 insertions(+), 120 deletions(-)
> delete mode 100644 board/Marvell/dreamplug/dreamplug.h
>
> diff --git a/board/Marvell/dreamplug/MAINTAINERS b/board/Marvell/dreamplug/MAINTAINERS
> index 2561ba8134..6bad3ea78b 100644
> --- a/board/Marvell/dreamplug/MAINTAINERS
> +++ b/board/Marvell/dreamplug/MAINTAINERS
> @@ -1,4 +1,5 @@
> DREAMPLUG BOARD
> +M: Tony Dinh <mibodhi at gmail.com>
> M: Jason Cooper <u-boot at lakedaemon.net>
> S: Maintained
> F: board/Marvell/dreamplug/
> diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c
> index 7ba14021b2..d15faa1cb7 100644
> --- a/board/Marvell/dreamplug/dreamplug.c
> +++ b/board/Marvell/dreamplug/dreamplug.c
> @@ -1,8 +1,7 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> - * Copyright (C) 2021 Tony Dinh <mibodhi at gmail.com>
> - * (C) Copyright 2011
> - * Jason Cooper <u-boot at lakedaemon.net>
> + * Copyright (C) 2021-2022 Tony Dinh <mibodhi at gmail.com>
> + * Copyright (C) 2011 Jason Cooper <u-boot at lakedaemon.net>
> *
> * Based on work by:
> * Marvell Semiconductor <www.marvell.com>
> @@ -11,16 +10,19 @@
>
> #include <common.h>
> #include <init.h>
> -#include <miiphy.h>
> -#include <net.h>
> +#include <netdev.h>
> #include <asm/arch/cpu.h>
> #include <asm/arch/soc.h>
> #include <asm/arch/mpp.h>
> #include <asm/global_data.h>
> -#include "dreamplug.h"
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +#define DREAMPLUG_OE_LOW (~(0))
> +#define DREAMPLUG_OE_HIGH (~(0))
> +#define DREAMPLUG_OE_VAL_LOW 0
> +#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */
> +
> int board_early_init_f(void)
> {
> /*
> @@ -90,83 +92,15 @@ int board_early_init_f(void)
> return 0;
> }
>
> -int board_init(void)
> -{
> - /* adress of boot parameters */
> - gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
> -
> - return 0;
> -}
> -
> -static int fdt_get_phy_addr(const char *path)
> -{
> - const void *fdt = gd->fdt_blob;
> - const u32 *reg;
> - const u32 *val;
> - int node, phandle, addr;
> -
> - /* Find the node by its full path */
> - node = fdt_path_offset(fdt, path);
> - if (node >= 0) {
> - /* Look up phy-handle */
> - val = fdt_getprop(fdt, node, "phy-handle", NULL);
> - if (val) {
> - phandle = fdt32_to_cpu(*val);
> - if (!phandle)
> - return -1;
> - /* Follow it to its node */
> - node = fdt_node_offset_by_phandle(fdt, phandle);
> - if (node) {
> - /* Look up reg */
> - reg = fdt_getprop(fdt, node, "reg", NULL);
> - if (reg) {
> - addr = fdt32_to_cpu(*reg);
> - return addr;
> - }
> - }
> - }
> - }
> - return -1;
> -}
> -
> -#ifdef CONFIG_RESET_PHY_R
> -void mv_phy_88e1116_init(const char *name, const char *path)
> +int board_eth_init(struct bd_info *bis)
> {
> - u16 reg;
> - int phyaddr;
> -
> - if (miiphy_set_current_dev(name))
> - return;
> -
> - phyaddr = fdt_get_phy_addr(path);
> - if (phyaddr < 0)
> - return;
> -
> - /*
> - * Enable RGMII delay on Tx and Rx for CPU port
> - * Ref: sec 4.7.2 of chip datasheet
> - */
> - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
> - miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL2_REG, ®);
> - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
> - miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL2_REG, reg);
> - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
> -
> - /* reset the phy */
> - miiphy_reset(name, phyaddr);
> -
> - printf("88E1116 Initialized on %s\n", name);
> + return cpu_eth_init(bis);
> }
>
> -void reset_phy(void)
> +int board_init(void)
> {
> - char *eth0_name = "ethernet-controller at 72000";
> - char *eth0_path = "/ocp at f1000000/ethernet-controller at 72000/ethernet0-port at 0";
> - char *eth1_name = "ethernet-controller at 76000";
> - char *eth1_path = "/ocp at f1000000/ethernet-controller at 76000/ethernet1-port at 0";
> + /* address of boot parameters */
> + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
>
> - /* configure and initialize both PHY's */
> - mv_phy_88e1116_init(eth0_name, eth0_path);
> - mv_phy_88e1116_init(eth1_name, eth1_path);
> + return 0;
> }
> -#endif /* CONFIG_RESET_PHY_R */
> diff --git a/board/Marvell/dreamplug/dreamplug.h b/board/Marvell/dreamplug/dreamplug.h
> deleted file mode 100644
> index 6f62238985..0000000000
> --- a/board/Marvell/dreamplug/dreamplug.h
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> -/*
> - * (C) Copyright 2011
> - * Jason Cooper <u-boot at lakedaemon.net>
> - *
> - * Based on work by:
> - * Marvell Semiconductor <www.marvell.com>
> - * Written-by: Siddarth Gore <gores at marvell.com>
> - */
> -
> -#ifndef __DREAMPLUG_H
> -#define __DREAMPLUG_H
> -
> -#define DREAMPLUG_OE_LOW (~(0))
> -#define DREAMPLUG_OE_HIGH (~(0))
> -#define DREAMPLUG_OE_VAL_LOW 0
> -#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */
> -
> -/* PHY related */
> -#define MV88E1116_MAC_CTRL2_REG 21
> -#define MV88E1116_PGADR_REG 22
> -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
> -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
> -
> -#endif /* __DREAMPLUG_H */
> diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
> index 557013dbac..19d0b59a99 100644
> --- a/configs/dreamplug_defconfig
> +++ b/configs/dreamplug_defconfig
> @@ -45,6 +45,7 @@ CONFIG_SATA_MV=y
> CONFIG_MTD=y
> CONFIG_DM_SPI_FLASH=y
> CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_PHY_MARVELL=y
> CONFIG_DM_ETH=y
> CONFIG_MVGBE=y
> CONFIG_MII=y
> diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h
> index beea234d8d..6ff92fa5f2 100644
> --- a/include/configs/dreamplug.h
> +++ b/include/configs/dreamplug.h
> @@ -1,7 +1,7 @@
> /* SPDX-License-Identifier: GPL-2.0+ */
> /*
> - * (C) Copyright 2011
> - * Jason Cooper <u-boot at lakedaemon.net>
> + * (C) Copyright 2022 Tony Dinh <mibodhi at gmail.com>
> + * (C) Copyright 2011 Jason Cooper <u-boot at lakedaemon.net>
> *
> * Based on work by:
> * Marvell Semiconductor <www.marvell.com>
> @@ -13,15 +13,6 @@
>
> #include "mv-common.h"
>
> -/*
> - * Environment variables configurations
> - */
> -
> -/*
> - * max 4k env size is enough, but in case of nand
> - * it has to be rounded to sector size
> - */
> -
> /*
> * Default environment variables
> */
> @@ -36,17 +27,16 @@
> /*
> * Ethernet Driver configuration
> */
> -#ifdef CONFIG_CMD_NET
> #define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */
> #define CONFIG_PHY_BASE_ADR 0
> -#endif /* CONFIG_CMD_NET */
> +#ifdef CONFIG_RESET_PHY_R
> +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */
> +#endif
>
> /*
> * SATA Driver configuration
> */
> -#ifdef CONFIG_SATA
> #define CONFIG_SYS_SATA_MAX_DEVICE 1
> #define CONFIG_LBA48
> -#endif /* CONFIG_SATA */
>
> #endif /* _CONFIG_DREAMPLUG_H */
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de
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