[PATCH 2/3] mmc: fsl_esdhc_imx: remove redundant ARCH_MXC
haibo.chen at nxp.com
haibo.chen at nxp.com
Fri Feb 11 12:16:56 CET 2022
From: Haibo Chen <haibo.chen at nxp.com>
Now original fsl_esdhc.c are split as fsl_esdhc.c and fsl_esdhc_imx.c.
fsl_esdhc_imx.c only cover i.MX SoC. So ARCH_MXC is redundant.
Signed-off-by: Haibo Chen <haibo.chen at nxp.com>
---
drivers/mmc/fsl_esdhc_imx.c | 15 +++------------
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 362e3e13b6..0be7cae1e5 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -596,16 +596,12 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
int sdhc_clk = priv->sdhc_clk;
uint clk;
- if (IS_ENABLED(ARCH_MXC)) {
#if IS_ENABLED(CONFIG_MX53)
- /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */
- pre_div = (regs == (struct fsl_esdhc *)MMC_SDHC3_BASE_ADDR) ? 2 : 1;
+ /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */
+ pre_div = (regs == (struct fsl_esdhc *)MMC_SDHC3_BASE_ADDR) ? 2 : 1;
#else
- pre_div = 1;
+ pre_div = 1;
#endif
- } else {
- pre_div = 2;
- }
while (sdhc_clk / (16 * pre_div * ddr_pre_div) > clock && pre_div < 256)
pre_div *= 2;
@@ -1016,11 +1012,6 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
esdhc_write32(®s->dllctrl, 0x0);
}
-#ifndef ARCH_MXC
- /* Enable cache snooping */
- esdhc_write32(®s->scr, 0x00000040);
-#endif
-
if (IS_ENABLED(CONFIG_FSL_USDHC))
esdhc_setbits32(®s->vendorspec,
VENDORSPEC_HCKEN | VENDORSPEC_IPGEN);
--
2.17.1
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