[PATCH v2] ARM: imx: imx8mn-ddr4-evk: Add ethernet support

[Marek Vasut]

On 2/22/22 08:49, Michael Walle wrote:
> Hi Marek,

Hi,

> Am 2022-02-21 17:49, schrieb Marek Vasut:
>> On 2/21/22 11:10, Michael Walle wrote:
>>>> +int board_phy_config(struct phy_device *phydev)
>>>> +{
>>>> +    /* enable rgmii rxc skew and phy mode select to RGMII copper */
>>>> +    phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
>>>> +    phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
>>>> +
>>>> +    phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
>>>> +    phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
>>>> +    phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
>>>> +    phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
>>>
>>> This is a AR8031, correct?  Is there a reason why you don't use the
>>> device tree binding to set RGMII voltage, and RX and tx delays?
>>
>> I quickly cobbled this together from another board, since I needed
>> ethernet to do other tests with this board and the ethernet support
>> was missing. If you can send subsequent patch to flip this to DT-only
>> setup, I can test the patch on the board.
> 
> I neither have this board, nor do I care much about it. I just saw
> the usual hardcoded atheros phy settings being done in the board
> setup. That being said, you can find an example in:
>   arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts
> 
> But you have to figure out what you need. I guess the last four
> writes are the rgmii delays which are handled by
>    phy-mode = "rgmii-id";
> 
> The 0x8 to 0x1f is 1.8V RGMII voltage, you'd need to look at
> the schematics if that voltage is actually used. A Zero means
> 1.5V. If it's using 2.5V then you don't have to do anything
> because an external regulator is used.

One might almost think that's what NXP should've done for a while, 
considering this is a devkit and missing ethernet is a problem for any 
network boot.

So unless NXP is faster, I will try and convert this to DT next time I 
have the board on my desk.