[PATCH 9/9] Convert CONFIG_CHIP_SELECTS_PER_CTRL to Kconfig

Tom Rini trini at konsulko.com
Fri Feb 25 17:19:53 CET 2022 

This converts the following to Kconfig:
   CONFIG_CHIP_SELECTS_PER_CTRL

Cc: Alison Wang <alison.wang at nxp.com>
Cc: Pramod Kumar <pramod.kumar_1 at nxp.com>
Cc: Priyanka Jain <priyanka.jain at nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat at nxp.com>
Cc: Vladimir Oltean <olteanv at gmail.com>
Signed-off-by: Tom Rini <trini at konsulko.com>
---
 arch/arm/cpu/armv7/ls102xa/Kconfig           | 2 +-
 arch/arm/cpu/armv7/ls102xa/soc.c             | 2 ++
 arch/arm/cpu/armv8/fsl-layerscape/cpu.c      | 4 +++-
 configs/MPC8548CDS_36BIT_defconfig           | 1 +
 configs/MPC8548CDS_defconfig                 | 1 +
 configs/MPC8548CDS_legacy_defconfig          | 1 +
 configs/P1010RDB-PA_36BIT_NAND_defconfig     | 1 +
 configs/P1010RDB-PA_36BIT_NOR_defconfig      | 1 +
 configs/P1010RDB-PA_36BIT_SDCARD_defconfig   | 1 +
 configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 +
 configs/P1010RDB-PA_NAND_defconfig           | 1 +
 configs/P1010RDB-PA_NOR_defconfig            | 1 +
 configs/P1010RDB-PA_SDCARD_defconfig         | 1 +
 configs/P1010RDB-PA_SPIFLASH_defconfig       | 1 +
 configs/P1010RDB-PB_36BIT_NAND_defconfig     | 1 +
 configs/P1010RDB-PB_36BIT_NOR_defconfig      | 1 +
 configs/P1010RDB-PB_36BIT_SDCARD_defconfig   | 1 +
 configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 +
 configs/P1010RDB-PB_NAND_defconfig           | 1 +
 configs/P1010RDB-PB_NOR_defconfig            | 1 +
 configs/P1010RDB-PB_SDCARD_defconfig         | 1 +
 configs/P1010RDB-PB_SPIFLASH_defconfig       | 1 +
 configs/P1020RDB-PC_36BIT_NAND_defconfig     | 1 +
 configs/P1020RDB-PC_36BIT_SDCARD_defconfig   | 1 +
 configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
 configs/P1020RDB-PC_36BIT_defconfig          | 1 +
 configs/P1020RDB-PC_NAND_defconfig           | 1 +
 configs/P1020RDB-PC_SDCARD_defconfig         | 1 +
 configs/P1020RDB-PC_SPIFLASH_defconfig       | 1 +
 configs/P1020RDB-PC_defconfig                | 1 +
 configs/P1020RDB-PD_NAND_defconfig           | 1 +
 configs/P1020RDB-PD_SDCARD_defconfig         | 1 +
 configs/P1020RDB-PD_SPIFLASH_defconfig       | 1 +
 configs/P1020RDB-PD_defconfig                | 1 +
 configs/P2020RDB-PC_36BIT_NAND_defconfig     | 1 +
 configs/P2020RDB-PC_36BIT_SDCARD_defconfig   | 1 +
 configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
 configs/P2020RDB-PC_36BIT_defconfig          | 1 +
 configs/P2020RDB-PC_NAND_defconfig           | 1 +
 configs/P2020RDB-PC_SDCARD_defconfig         | 1 +
 configs/P2020RDB-PC_SPIFLASH_defconfig       | 1 +
 configs/P2020RDB-PC_defconfig                | 1 +
 configs/T1042D4RDB_NAND_defconfig            | 1 +
 configs/T1042D4RDB_SDCARD_defconfig          | 1 +
 configs/T1042D4RDB_SPIFLASH_defconfig        | 1 +
 configs/T1042D4RDB_defconfig                 | 1 +
 configs/kmcent2_defconfig                    | 1 +
 configs/qemu-ppce500_defconfig               | 1 +
 configs/socrates_defconfig                   | 1 +
 drivers/ddr/fsl/Kconfig                      | 4 ++++
 include/configs/MPC8548CDS.h                 | 1 -
 include/configs/P1010RDB.h                   | 1 -
 include/configs/P2041RDB.h                   | 1 -
 include/configs/T102xRDB.h                   | 1 -
 include/configs/T104xRDB.h                   | 1 -
 include/configs/T208xQDS.h                   | 1 -
 include/configs/T208xRDB.h                   | 1 -
 include/configs/T4240RDB.h                   | 1 -
 include/configs/corenet_ds.h                 | 1 -
 include/configs/km/pg-wcom-ls102xa.h         | 1 -
 include/configs/kmcent2.h                    | 1 -
 include/configs/kontron_sl28.h               | 1 -
 include/configs/ls1012a2g5rdb.h              | 1 -
 include/configs/ls1012afrdm.h                | 2 --
 include/configs/ls1012afrwy.h                | 2 --
 include/configs/ls1012aqds.h                 | 1 -
 include/configs/ls1012ardb.h                 | 1 -
 include/configs/ls1021aiot.h                 | 2 --
 include/configs/ls1021aqds.h                 | 1 -
 include/configs/ls1021atsn.h                 | 2 --
 include/configs/ls1021atwr.h                 | 2 --
 include/configs/ls1028a_common.h             | 1 -
 include/configs/ls1043aqds.h                 | 1 -
 include/configs/ls1043ardb.h                 | 1 -
 include/configs/ls1046afrwy.h                | 1 -
 include/configs/ls1046aqds.h                 | 1 -
 include/configs/ls1046ardb.h                 | 1 -
 include/configs/ls1088a_common.h             | 1 -
 include/configs/ls2080a_common.h             | 1 -
 include/configs/ls2080aqds.h                 | 1 -
 include/configs/ls2080ardb.h                 | 1 -
 include/configs/lx2160a_common.h             | 1 -
 include/configs/p1_p2_rdb_pc.h               | 2 --
 include/configs/qemu-ppce500.h               | 2 --
 include/configs/socrates.h                   | 1 -
 85 files changed, 56 insertions(+), 44 deletions(-)

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 6a948d7ba7f4..ef1f45650f3e 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -5,7 +5,7 @@ config ARCH_LS1021A
 	select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
 	select SYS_FSL_ERRATUM_A008378
 	select SYS_FSL_ERRATUM_A008407
-	select SYS_FSL_ERRATUM_A008850
+	select SYS_FSL_ERRATUM_A008850 if SYS_FSL_DDR
 	select SYS_FSL_ERRATUM_A008997 if USB
 	select SYS_FSL_ERRATUM_A009007 if USB
 	select SYS_FSL_ERRATUM_A009008 if USB
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 8a95ee86a9b7..c131d92b9938 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -12,7 +12,9 @@
 #include <asm/arch/ls102xa_soc.h>
 #include <asm/arch/ls102xa_stream_id.h>
 #include <fsl_csu.h>
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008850
 #include <fsl_ddr_sdram.h>
+#endif
 
 struct liodn_id_table sec_liodn_tbl[] = {
 	SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10),
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 2ded3e4efc90..177f568f26ee 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -8,7 +8,6 @@
 #include <clock_legacy.h>
 #include <cpu_func.h>
 #include <env.h>
-#include <fsl_ddr_sdram.h>
 #include <init.h>
 #include <hang.h>
 #include <log.h>
@@ -36,6 +35,7 @@
 #endif
 #include <asm/armv8/sec_firmware.h>
 #ifdef CONFIG_SYS_FSL_DDR
+#include <fsl_ddr_sdram.h>
 #include <fsl_ddr.h>
 #endif
 #include <asm/arch/clock.h>
@@ -1632,11 +1632,13 @@ void update_early_mmu_table(void)
 
 __weak int dram_init(void)
 {
+#ifdef CONFIG_SYS_FSL_DDR
 	fsl_initdram();
 #if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
 	defined(CONFIG_SPL_BUILD)
 	/* This will break-before-make MMU for DDR */
 	update_early_mmu_table();
+#endif
 #endif
 
 	return 0;
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index e040e5dc09e4..76d2b551a7a0 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -33,6 +33,7 @@ CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="8548cds/uImage.uboot"
 CONFIG_DM=y
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index c508d61055fa..6a5508746899 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="8548cds/uImage.uboot"
 CONFIG_DM=y
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index d6addc7ed163..ae262bf66d03 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="8548cds/uImage.uboot"
 CONFIG_DM=y
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index b1bb2c552d11..0782dce8ecce 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -59,6 +59,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_TPL_SYS_I2C_LEGACY=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index 02af639e3bbc..9c0df8499855 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -41,6 +41,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index a9ecce9af4b8..5804ba7d3a49 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index d7248b1976dc..bcf82ebba4e3 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -55,6 +55,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 132ed6982a25..a1cd44b16289 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -58,6 +58,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_TPL_SYS_I2C_LEGACY=y
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index 31bcb475cd51..3ce8e3f646b2 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -40,6 +40,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index c3b10b581484..7a6b19cccbc4 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -52,6 +52,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 2e50fc8e4f57..22798d8ec801 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -54,6 +54,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 0dc8322159f1..f861734e2ff2 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -60,6 +60,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_TPL_SYS_I2C_LEGACY=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 95366b24c60f..80a8f4e48f01 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -42,6 +42,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 5a6b8550ceb3..4082cef228fc 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -54,6 +54,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 656029df8c6f..4b581682e260 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -56,6 +56,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 776193509878..d8e588249e6d 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -59,6 +59,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_TPL_SYS_I2C_LEGACY=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index 19e54a8de890..bec233f645aa 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -41,6 +41,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index 598bacc5d408..f8a795df3f74 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -53,6 +53,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index cbe6df6a186b..510ff5e6dcb0 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -55,6 +55,7 @@ CONFIG_DM=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index e1e320dbef4b..b499ec3a6433 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -57,6 +57,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
 CONFIG_SYS_OR0_PRELIM=0xFFFF8396
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 00661d91be25..530693b5b60c 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -52,6 +52,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 6467032bd48b..75e58512cd63 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -54,6 +54,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 3009e2954e12..79afdab0a81c 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -41,6 +41,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 965eb7d2a119..44a4ec99e512 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -56,6 +56,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
 CONFIG_SYS_OR0_PRELIM=0xFFFF8396
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 6130ba7842f7..7e06a9aff737 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -51,6 +51,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 9c0547cb6207..da35cddf7ddd 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -53,6 +53,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index 353d9236ca55..c8919b77999b 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -40,6 +40,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 919c0d0ff6ef..cfc73c440432 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -59,6 +59,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
 CONFIG_SYS_OR0_PRELIM=0xFFFF8796
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 9d5d3faf83f8..2d3577309fd4 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -54,6 +54,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index e5b32daf350e..bce232e99d3a 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -56,6 +56,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index 632a3ed9b87a..5b1031796b12 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -43,6 +43,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index ad57ba072422..1731d4fc73e0 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -61,6 +61,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
 CONFIG_SYS_OR0_PRELIM=0xFFFF8396
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 4dc11436f282..6662fe961697 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -56,6 +56,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 2078af27f76c..d9d1f8b7908d 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -58,6 +58,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index 95202dc12b87..6111d3b76ff9 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -45,6 +45,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index f736336cf7c2..9e0de443fa17 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -60,6 +60,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
 CONFIG_SYS_OR0_PRELIM=0xFFFF8396
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 0e50bb26ca05..cbe30d3062a7 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -55,6 +55,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 4dbce7e36cb8..7f735008147d 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -57,6 +57,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 77b16b738adc..728336e065a0 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -44,6 +44,7 @@ CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
 CONFIG_SYS_OR0_PRELIM=0xFC000FF7
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index a6480e95fe09..76747d40e559 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -57,6 +57,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 418addce48de..a8d1fbe0242c 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -56,6 +56,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 922c3bb97cb8..97345114d336 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -58,6 +58,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 470fa85bfa34..a73bbb0e729a 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DM_I2C=y
diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index 32c9f49cb0d7..40f471ec22cd 100644
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -48,6 +48,7 @@ CONFIG_DM=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_FSL_DDR3=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y
diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig
index e6c998d8f873..3b3632f39d78 100644
--- a/configs/qemu-ppce500_defconfig
+++ b/configs/qemu-ppce500_defconfig
@@ -37,6 +37,7 @@ CONFIG_DM=y
 CONFIG_SIMPLE_BUS_CORRECT_RANGE=y
 CONFIG_BLK=y
 CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_CHIP_SELECTS_PER_CTRL=0
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_FSL=y
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 034d299d8728..e24be7a853f6 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -46,6 +46,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_ENV_ADDR=0xFFF40000
 CONFIG_ENV_ADDR_REDUND=0xFFF20000
 CONFIG_DM=y
+CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFE001001
 CONFIG_SYS_OR0_PRELIM=0xFE000030
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index b0e6df8be412..277167060432 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -49,6 +49,10 @@ config SYS_NUM_DDR_CTLRS
 			ARCH_LX2162A
 	default 1
 
+config CHIP_SELECTS_PER_CTRL
+	int "Number of chip selects per controller"
+	default 4
+
 config SYS_FSL_DDR_VER
 	int
 	default 50 if SYS_FSL_DDR_VER_50
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 08ab80026f49..093061b52ffc 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -48,7 +48,6 @@
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 /* I2C addresses of SPD EEPROMs */
 #define SPD_EEPROM_ADDRESS	0x51	/* CTLR 0 DIMM 0 */
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index a9c4930d770a..5f36951932d4 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -170,7 +170,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	1
 
 /* DDR3 Controller Settings */
 #define CONFIG_SYS_DDR_CS0_BNDS		0x0000003f
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 38341984a029..045d91149338 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -93,7 +93,6 @@
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x52
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index a7c47c79b35e..f803b51f4588 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -152,7 +152,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #if defined(CONFIG_TARGET_T1024RDB)
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x51
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 7365ee4a2ac1..8a71807679ee 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -132,7 +132,6 @@
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x51
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index fec70fe739ea..76e00cc095d0 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -117,7 +117,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR	2
-#define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define CONFIG_SYS_SDRAM_SIZE	2048	/* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1	0x51
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 0c47b2ddf118..35064fec7e4d 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -112,7 +112,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define CONFIG_SYS_SDRAM_SIZE	2048	/* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1	0x51
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 15a088ff2252..8c9e5806e0b0 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -93,7 +93,6 @@
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 
 /*
  * IFC Definitions
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index a67a89a1148f..c5a8567e1f64 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -96,7 +96,6 @@
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	(4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_SYS_SPD_BUS_NUM	1
 #define SPD_EEPROM_ADDRESS1	0x51
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index 7b3e1d7188c5..97f645304566 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -23,7 +23,6 @@
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 
 #define CONFIG_SYS_SPD_BUS_NUM		0
 #define SPD_EEPROM_ADDRESS		0x54
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 52a5ff9382ed..707926f324c7 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -175,7 +175,6 @@
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x54
diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h
index 448749a7f81d..9eeb7ef9bfc2 100644
--- a/include/configs/kontron_sl28.h
+++ b/include/configs/kontron_sl28.h
@@ -19,7 +19,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
 
 #define CONFIG_VERY_BIG_RAM
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	0
diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index 0263bb82893f..8191c856a93f 100644
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -10,7 +10,6 @@
 
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_SYS_SDRAM_SIZE		0x40000000
 
 /* SATA */
diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
index ef57cf6aaa31..7735a005e20a 100644
--- a/include/configs/ls1012afrdm.h
+++ b/include/configs/ls1012afrdm.h
@@ -10,9 +10,7 @@
 
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
-#define CONFIG_CHIP_SELECTS_PER_CTRL	1
 
 #ifndef CONFIG_SPL_BUILD
 #undef BOOT_TARGET_DEVICES
diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index c61865ccd4e7..7d8d6ee085f3 100644
--- a/include/configs/ls1012afrwy.h
+++ b/include/configs/ls1012afrwy.h
@@ -14,10 +14,8 @@
 #define BOARD_REV_MASK			0x001A0000
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define SYS_SDRAM_SIZE_512		0x20000000
 #define SYS_SDRAM_SIZE_1024		0x40000000
-#define CONFIG_CHIP_SELECTS_PER_CTRL	1
 
 /* ENV */
 #define CONFIG_SYS_FSL_QSPI_BASE	0x40000000
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index cbcb3f72a562..d57f28e4967e 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -11,7 +11,6 @@
 
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_SYS_SDRAM_SIZE		0x40000000
 
 /*
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index c9a152e08a27..c51c4f2d3eab 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -11,7 +11,6 @@
 
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_SYS_SDRAM_SIZE		0x40000000
 
 /*
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 2e5b804a4cbc..4e5228aa219b 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -59,8 +59,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
-
 /*
  * Serial Port
  */
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 864584bbbe9f..b6501e87b41f 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -54,7 +54,6 @@
 #define CONFIG_SYS_DDR_RAW_TIMING
 #endif
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h
index 5f6c2a003707..824078dd27de 100644
--- a/include/configs/ls1021atsn.h
+++ b/include/configs/ls1021atsn.h
@@ -77,8 +77,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
-
 /* Serial Port */
 #define CONFIG_SYS_NS16550_SERIAL
 #ifndef CONFIG_DM_SERIAL
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 38bcb5cae318..fada8aa61db8 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -79,8 +79,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
-
 /*
  * IFC Definitions
  */
diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index a517346c1298..8bdfddcbc758 100644
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -40,7 +40,6 @@
 /* Miscellaneous configurable options */
 
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE		128
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index eb95f53a7764..e9919cd05f7a 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -12,7 +12,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 
 #define SPD_EEPROM_ADDRESS		0x51
 #define CONFIG_SYS_SPD_BUS_NUM		0
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index dbeafe33579b..c904c9ca90b0 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -12,7 +12,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 
 #define CONFIG_SYS_SPD_BUS_NUM		0
 
diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h
index 14ad84a1ef46..8425d17992c6 100644
--- a/include/configs/ls1046afrwy.h
+++ b/include/configs/ls1046afrwy.h
@@ -11,7 +11,6 @@
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
-#define CONFIG_CHIP_SELECTS_PER_CTRL   4
 
 #define CONFIG_SYS_UBOOT_BASE		0x40100000
 
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index d77119a7b224..2972e3beac22 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -12,7 +12,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 
 #define SPD_EEPROM_ADDRESS		0x51
 #define CONFIG_SYS_SPD_BUS_NUM		0
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 8ed1dceb2343..f6ff69032925 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -13,7 +13,6 @@
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 
 #define SPD_EEPROM_ADDRESS		0x51
 #define CONFIG_SYS_SPD_BUS_NUM		0
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index 33b70c8d8f68..965fdfead24b 100644
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -132,7 +132,6 @@ unsigned long long get_qixis_addr(void);
 #endif
 
 /* Physical Memory Map */
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE		128
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index f2725af0534c..766da3969d2c 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -139,7 +139,6 @@ unsigned long long get_qixis_addr(void);
 
 /* Physical Memory Map */
 /* fixme: these need to be checked against the board */
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE		128
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 7554de1f6d31..1c59a89dbcf3 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -27,7 +27,6 @@
 #define SPD_EEPROM_ADDRESS	SPD_EEPROM_ADDRESS1
 #define CONFIG_SYS_SPD_BUS_NUM	0	/* SPD on I2C bus 0 */
 #define CONFIG_DIMM_SLOTS_PER_CTLR		2
-#define CONFIG_CHIP_SELECTS_PER_CTRL		4
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	1
 #endif
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 1c05b0867781..de77872a7098 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -37,7 +37,6 @@
 #define SPD_EEPROM_ADDRESS	SPD_EEPROM_ADDRESS1
 #define CONFIG_SYS_SPD_BUS_NUM	0	/* SPD on I2C bus 0 */
 #define CONFIG_DIMM_SLOTS_PER_CTLR		2
-#define CONFIG_CHIP_SELECTS_PER_CTRL		4
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
 #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR	1
 #endif
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index e31f8d087f71..c407fa8ba17f 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -34,7 +34,6 @@
 #define SPD_EEPROM_ADDRESS		SPD_EEPROM_ADDRESS1
 #define CONFIG_SYS_SPD_BUS_NUM		0	/* SPD on I2C bus 0 */
 #define CONFIG_DIMM_SLOTS_PER_CTLR	2
-#define CONFIG_CHIP_SELECTS_PER_CTRL	4
 #define CONFIG_SYS_MONITOR_LEN		(936 * 1024)
 
 /* Miscellaneous configurable options */
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 3a7adcc3f56c..926318993ae0 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -164,10 +164,8 @@
 
 #if defined(CONFIG_TARGET_P1020RDB_PD)
 #define CONFIG_SYS_SDRAM_SIZE_LAW	LAW_SIZE_2G
-#define CONFIG_CHIP_SELECTS_PER_CTRL	2
 #else
 #define CONFIG_SYS_SDRAM_SIZE_LAW	LAW_SIZE_1G
-#define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #endif
 #define CONFIG_SYS_SDRAM_SIZE		(1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 88b3045efb10..296361aa0388 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -43,8 +43,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_CHIP_SELECTS_PER_CTRL	0
-
 #define CONFIG_SYS_BOOT_BLOCK		0x00000000	/* boot TLB */
 
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 482a920d33ea..4d562d49c97e 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -60,7 +60,6 @@
 #define CONFIG_VERY_BIG_RAM
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
-#define CONFIG_CHIP_SELECTS_PER_CTRL	2
 
 /* I2C addresses of SPD EEPROMs */
 #define SPD_EEPROM_ADDRESS	0x50	/* CTLR 0 DIMM 0 */
-- 
2.25.1

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