[PATCH V3 1/2] net: ravb: Add tx/rx delay flag checks and support for rgmii-rxid

[Adam Ford]

Some boards like the Beacon RZ/G2 SOM use either flags for
tx-internal-delay-ps, rx-internal-delay-ps or rgmii-rxid.

In Linux the APSR_RDM flag is set when either rx-internal-delay-ps
is set or the mode is rgmii-rxid, and the APSR_TDM is set when
tx-internal-delay-ps is found or rgmii-txid is set, and both
are set if rgmii-id is set.

The ravb driver in U-Boot driver was missing rgmii-rxid support,
so add that support in a similar fashion to what is done in Linux.

Signed-off-by: Adam Ford <aford173 at gmail.com>
---
V3:  Re-order the checks for rx/tx-internal-delay-ps so the rx
     comes before the tx.

V2:  Add boolean for explit delays which skips the rgmii mode check
     if explicit delays are set.  This more closely matches the
     behavior in Linux.  Also add the same comments for the delays
     to match the comments found in Linux.

diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index 1d1118c341..4078d33bb5 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -52,6 +52,7 @@
 #define CSR_OPS			0x0000000F
 #define CSR_OPS_CONFIG		BIT(1)
 
+#define APSR_RDM		BIT(13)
 #define APSR_TDM		BIT(14)
 
 #define TCCR_TSRQ0		BIT(0)
@@ -376,6 +377,9 @@ static int ravb_dmac_init(struct udevice *dev)
 	struct ravb_priv *eth = dev_get_priv(dev);
 	struct eth_pdata *pdata = dev_get_plat(dev);
 	int ret = 0;
+	int mode = 0;
+	unsigned int delay;
+	bool explicit_delay = false;
 
 	/* Set CONFIG mode */
 	ret = ravb_reset(dev);
@@ -402,9 +406,33 @@ static int ravb_dmac_init(struct udevice *dev)
 	    (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
 		return 0;
 
-	if ((pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) ||
-	    (pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID))
-		writel(APSR_TDM, eth->iobase + RAVB_REG_APSR);
+	if (!dev_read_u32(dev, "rx-internal-delay-ps", &delay)) {
+		/* Valid values are 0 and 1800, according to DT bindings */
+		if (delay) {
+			mode |= APSR_RDM;
+			explicit_delay = true;
+		}
+	}
+
+	if (!dev_read_u32(dev, "tx-internal-delay-ps", &delay)) {
+		/* Valid values are 0 and 2000, according to DT bindings */
+		if (delay) {
+			mode |= APSR_TDM;
+			explicit_delay = true;
+		}
+	}
+
+	if (!explicit_delay) {
+		if (pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
+		    pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID)
+			mode |= APSR_RDM;
+
+		if (pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
+		    pdata->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID)
+			mode |= APSR_TDM;
+	}
+
+	writel(mode, eth->iobase + RAVB_REG_APSR);
 
 	return 0;
 }
-- 
2.34.1