[PATCH v7 05/19] rockchip: clk: add SCLK_TIMER[0..2] to clk_rk3066.c

[Johan Jonker]

Add SCLK_TIMER[0..2] to clk_rk3066 in use by the dw-apb-timer.c driver.

Signed-off-by: Johan Jonker <jbx6244 at gmail.com>
---
 drivers/clk/rockchip/clk_rk3066.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
index 3b7de51c..2fc4d5c9 100644
--- a/drivers/clk/rockchip/clk_rk3066.c
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -527,6 +527,10 @@ static ulong rk3066_clk_get_rate(struct clk *clk)
 	case SCLK_TSADC:
 		new_rate = rk3066_clk_saradc_get_clk(priv->cru, clk->id);
 		break;
+	case SCLK_TIMER0:
+	case SCLK_TIMER1:
+	case SCLK_TIMER2:
+		return OSC_HZ;
 	default:
 		return -ENOENT;
 	}
-- 
2.20.1