[PATCH v2 3/3] arm: apple: Use watchdog timer for system reset

Mark Kettenis kettenis at openbsd.org
Wed Jan 12 19:55:17 CET 2022


Rely on the new watchdog timer driver and the sysreset uclass to
reset the system.  This gets rid of hard-coded addresses and
should work on systems based on the new M1 Pro and M1 Max SoCs
as well.

Signed-off-by: Mark Kettenis <kettenis at openbsd.org>
Reviewed-by: Simon Glass <sjg at chromium.org>
Reviewed-by: Stefan Roese <sr at denx.de>
Tested-on: Apple M1 Macbook
Tested-by: Simon Glass <sjg at chromium.org>
---
 arch/arm/Kconfig            |  3 +++
 arch/arm/mach-apple/board.c | 24 ------------------------
 2 files changed, 3 insertions(+), 24 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7264d72bde..78c6b2e92d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -942,6 +942,9 @@ config ARCH_APPLE
 	select OF_CONTROL
 	select PINCTRL
 	select POSITION_INDEPENDENT
+	select SYSRESET
+	select SYSRESET_WATCHDOG
+	select SYSRESET_WATCHDOG_AUTO
 	select USB
 	imply CMD_DM
 	imply CMD_GPT
diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c
index 0bfbc473ec..b7e8d212f1 100644
--- a/arch/arm/mach-apple/board.c
+++ b/arch/arm/mach-apple/board.c
@@ -119,30 +119,6 @@ int dram_init_banksize(void)
 	return fdtdec_setup_memory_banksize();
 }
 
-#define APPLE_WDT_BASE		0x23d2b0000ULL
-
-#define APPLE_WDT_SYS_CTL_ENABLE	BIT(2)
-
-typedef struct apple_wdt {
-	u32	reserved0[3];
-	u32	chip_ctl;
-	u32	sys_tmr;
-	u32	sys_cmp;
-	u32	reserved1;
-	u32	sys_ctl;
-} apple_wdt_t;
-
-void reset_cpu(void)
-{
-	apple_wdt_t *wdt = (apple_wdt_t *)APPLE_WDT_BASE;
-
-	writel(0, &wdt->sys_cmp);
-	writel(APPLE_WDT_SYS_CTL_ENABLE, &wdt->sys_ctl);
-
-	while(1)
-		wfi();
-}
-
 extern long fw_dtb_pointer;
 
 void *board_fdt_blob_setup(int *err)
-- 
2.34.1



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