[PATCH v7 07/19] rockchip: rk3066: fix assigned-clocks rk3066_clk_set_rate

Sean Anderson seanga2 at gmail.com
Sat Jan 15 18:28:46 CET 2022


On 1/11/22 4:18 PM, Johan Jonker wrote:
> The rk3066 cru node has a number of assigned-clocks properties
> that call the .set_rate() function. Add them to the list so that
> they return a 0 instead of -ENOENT.
> 
> Signed-off-by: Johan Jonker <jbx6244 at gmail.com>
> ---
>   drivers/clk/rockchip/clk_rk3066.c | 9 +++++++++
>   1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
> index 804aa43b..17777a45 100644
> --- a/drivers/clk/rockchip/clk_rk3066.c
> +++ b/drivers/clk/rockchip/clk_rk3066.c
> @@ -573,6 +573,15 @@ static ulong rk3066_clk_set_rate(struct clk *clk, ulong rate)
>   	case SCLK_TSADC:
>   		new_rate = rk3066_clk_saradc_set_clk(cru, rate, clk->id);
>   		break;
> +	case PLL_CPLL:
> +	case PLL_GPLL:
> +	case ACLK_CPU:
> +	case HCLK_CPU:
> +	case PCLK_CPU:
> +	case ACLK_PERI:
> +	case HCLK_PERI:
> +	case PCLK_PERI:
> +		return 0;
>   	default:
>   		return -ENOENT;
>   	}
> 

These 3 patches look good, but I don't understand why they aren't squashed in with the first patch.

--Sean


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