[PATCH] net: gem: Workaround gmii2rgmii bridge DT node issue

Michal Simek monstr at monstr.eu
Mon Jan 17 10:02:58 CET 2022


pá 14. 1. 2022 v 13:08 odesílatel Michal Simek <michal.simek at xilinx.com> napsal:
>
> From: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
>
> For configurations with gmii2rgmii and external phy the DT nodes link
> should be gem->gmii2rgmii->phy. But due to limitation in Linux driver
> the DT is mentioned as gem->phy and gmii2rgmii->phy as shown in below DT.
>
> ethernet at ff0c0000 {
>         compatible = "cdns,zynqmp-gem\0cdns,gem";
>         status = "okay";
>         interrupt-parent = <0x04>;
>         interrupts = <0x00 0x3b 0x04 0x00 0x3b 0x04>;
>         reg = <0x00 0xff0c0000 0x00 0x1000>;
>         clock-names = "pclk\0hclk\0tx_clk\0rx_clk\0tsu_clk";
>         #address-cells = <0x01>;
>         #size-cells = <0x00>;
>         #stream-id-cells = <0x01>;
>         iommus = <0x0d 0x875>;
>         power-domains = <0x0c 0x1e>;
>         clocks = <0x03 0x1f 0x03 0x69 0x03 0x2e 0x03 0x32 0x03 0x2c>;
>         phy-handle = <0x0e>;
>         phy-mode = "gmii";
>         xlnx,ptp-enet-clock = <0x00>;
>         local-mac-address = [ff ff ff ff ff ff];
>         phandle = <0x4d>;
>
>         mdio {
>                 #address-cells = <0x01>;
>                 #size-cells = <0x00>;
>                 phandle = <0x4e>;
>
>                 ethernet-phy at 1 {
>                         reg = <0x01>;
>                         rxc-skew-ps = <0x708>;
>                         txc-skew-ps = <0x708>;
>                         phandle = <0x0e>;
>                 };
>
>                 gmii_to_rgmii_0 at 8 {
>                         compatible = "xlnx,gmii-to-rgmii-1.0";
>                         phy-handle = <0x0e>;
>                         reg = <0x08>;
>                         phandle = <0x4f>;
>                 };
>         };
> };
>
> Since same DT is used in Linux and U-Boot we need to workaround this
> issue by using the gmii2rgmii node which points to phy and we should
> ignore the gem pointing to phy directly.
>
> Do this workaround by updating priv->phydev->node value with
> priv->phy_of_node only if it is not valid node.
>
> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
>
>  drivers/net/zynq_gem.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index b751d28e611f..f238811786c6 100644
> --- a/drivers/net/zynq_gem.c
> +++ b/drivers/net/zynq_gem.c
> @@ -338,7 +338,8 @@ static int zynq_phy_init(struct udevice *dev)
>                                   ADVERTISED_Asym_Pause;
>
>         priv->phydev->advertising = priv->phydev->supported;
> -       priv->phydev->node = priv->phy_of_node;
> +       if (!ofnode_valid(priv->phydev->node))
> +               priv->phydev->node = priv->phy_of_node;
>
>         return phy_config(priv->phydev);
>  }
> --
> 2.34.1
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs


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