[PATCH v4 5/7] configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m

[Mamta Shukla]

The macro `CONFIG_SYS_UBOOT_BASE` is used by SPL loaders `"NOR"` and
`"XIP"` to determine the base address of u-boot.

For `"NOR"` on i.MX8MM it is the base address of QSPI0 plus the offset
of the flattened image tree blob.
Although `QSPI0_AMBA_BASE` is used to define CONFIG_SYS_UBOOT_BASE in
multiple board header files for i.MX8MM, it is not specified.

Specify offset of flattened image tree blob (needs to be set to same
value as specified in 'binman' node), base address of QSPI0 and size of
FlexSPI configuration block.

Signed-off-by: Mamta Shukla <mamta.shukla at leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle at leica-geosystems.com>
Tested-by: Adam Ford <aford173 at gmail.com> 
Reviewed-by: Fabio Estevam <festevam at denx.de> 
---
v2:
-No changes

v3:
-No changes

v4:
-Add condition for CONFIG_SYS_UBOOT_BASE for mmc/sd card build
-Define QPSI0_AMBA_BASE in imx-regs.h since it is imx8mm specific

 arch/arm/include/asm/arch-imx8m/imx-regs.h |  1 +
 include/configs/imx8mm_evk.h               | 12 +++++++++++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 1da75528d4..39ba36505c 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -45,6 +45,7 @@
 #define UART4_BASE_ADDR		0x30A60000
 #define USDHC1_BASE_ADDR	0x30B40000
 #define USDHC2_BASE_ADDR	0x30B50000
+#define QSPI0_AMBA_BASE		0x08000000
 #ifdef CONFIG_IMX8MM
 #define USDHC3_BASE_ADDR	0x30B60000
 #endif
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 5e8f19c43f..54dee5b586 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -13,8 +13,18 @@
 #define CONFIG_SYS_BOOTM_LEN		(64 * SZ_1M)
 #define CONFIG_SPL_MAX_SIZE		(148 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		SZ_512K
+#define UBOOT_ITB_OFFSET 0x57C00
+#define FSPI_CONF_BLOCK_SIZE		0x1000
+#define UBOOT_ITB_OFFSET_FSPI	\
+	(UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE)
+
+#ifdef CONFIG_FSPI_CONF_HEADER
+#define CONFIG_SYS_UBOOT_BASE	\
+		(QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI)
+#else
 #define CONFIG_SYS_UBOOT_BASE	\
-	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+		(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+#endif
 
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_STACK		0x920000
-- 
2.25.1