[PATCH v11 10/13] fpga: zynqmp: optimize zynqmppl_load() code
Michal Simek
michal.simek at amd.com
Fri Jul 8 14:43:07 CEST 2022
On 7/5/22 21:23, Oleksandr Suvorov wrote:
> Optimize function code preparing to add secure bitstream types
> support.
Can you please extend this? I understand what you do below but better
description will be good.
>
> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov at foundries.io>
> Tested-by: Ricardo Salveti <ricardo at foundries.io>
> Tested-by: Adrian Fiergolski <adrian.fiergolski at fastree3d.com>
> ---
>
> (no changes since v1)
>
> drivers/fpga/zynqmppl.c | 27 +++++++++++++--------------
> 1 file changed, 13 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
> index 239c498f7b5..6959b8ae97e 100644
> --- a/drivers/fpga/zynqmppl.c
> +++ b/drivers/fpga/zynqmppl.c
> @@ -199,46 +199,45 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf,
> return 0;
> }
>
> -static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
> - bitstream_type bstype, int flags)
> +static int zynqmp_load(xilinx_desc *desc, const void *buf,
> + size_t bsize, bitstream_type bstype,
> + int flags)
This is unrelated to commit. This is purely coding style change.
> {
> ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
> u32 swap = 0;
> ulong bin_buf;
> int ret;
> u32 buf_lo, buf_hi;
> + u32 bsize_req = (u32)bsize;
> u32 ret_payload[PAYLOAD_ARG_CNT];
> - bool xilfpga_old = false;
> +
> + debug("%s called!\n", __func__);
>
> if (zynqmp_firmware_version() <= PMUFW_V1_0) {
> puts("WARN: PMUFW v1.0 or less is detected\n");
> puts("WARN: Not all bitstream formats are supported\n");
> puts("WARN: Please upgrade PMUFW\n");
> - xilfpga_old = true;
> - if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap))
> + if (zynqmp_validate_bitstream(desc, buf, bsize,
> + bsize, &swap))
This is also coding style change only.
> return FPGA_FAIL;
> bsizeptr = (u32 *)&bsize;
> flush_dcache_range((ulong)bsizeptr,
> (ulong)bsizeptr + sizeof(size_t));
> + bsize_req = (u32)(uintptr_t)bsizeptr;
> bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
> + } else {
> + bstype = 0;
> }
>
> bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
>
> - debug("%s called!\n", __func__);
nit: And this also has nothing to do with optimization. You just changed location.
> flush_dcache_range(bin_buf, bin_buf + bsize);
>
> buf_lo = (u32)bin_buf;
> buf_hi = upper_32_bits(bin_buf);
>
> - if (xilfpga_old)
> - ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
> - buf_hi, (u32)(uintptr_t)bsizeptr,
> - bstype, ret_payload);
> - else
> - ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo,
> - buf_hi, (u32)bsize, 0, ret_payload);
> -
> + ret = xilinx_pm_request(PM_FPGA_LOAD, buf_lo, buf_hi,
> + bsize_req, bstype, ret_payload);
> if (ret)
> printf("PL FPGA LOAD failed with err: 0x%08x\n", ret);
>
M
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