[PATCH] arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED

Michal Simek monstr at monstr.eu
Fri Jul 15 09:42:34 CEST 2022



On 7/7/22 10:47, Michal Simek wrote:
> CONFIG_OF_LIBFDT is used twice for guarding the same code. It is enough to
> do it once that's why remove additional ifdefs from arm and risc-v code.
> 
> Fixes: 0c303f9a6628 ("image: Drop IMAGE_ENABLE_OF_LIBFDT")
> Signed-off-by: Michal Simek <michal.simek at amd.com>
> ---
> 
>   arch/arm/lib/bootm.c   | 2 --
>   arch/riscv/lib/bootm.c | 2 --
>   2 files changed, 4 deletions(-)
> 
> diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
> index a59a5e6c0ea0..fc22befeac1f 100644
> --- a/arch/arm/lib/bootm.c
> +++ b/arch/arm/lib/bootm.c
> @@ -200,12 +200,10 @@ static void boot_prep_linux(bootm_headers_t *images)
>   	char *commandline = env_get("bootargs");
>   
>   	if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
> -#ifdef CONFIG_OF_LIBFDT
>   		debug("using: FDT\n");
>   		if (image_setup_linux(images)) {
>   			panic("FDT creation failed!");
>   		}
> -#endif
>   	} else if (BOOTM_ENABLE_TAGS) {
>   		debug("using: ATAGS\n");
>   		setup_start_tag(gd->bd);
> diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
> index 2e1e286c8ef6..c1ac339283a6 100644
> --- a/arch/riscv/lib/bootm.c
> +++ b/arch/riscv/lib/bootm.c
> @@ -65,13 +65,11 @@ static void announce_and_cleanup(int fake)
>   static void boot_prep_linux(bootm_headers_t *images)
>   {
>   	if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
> -#ifdef CONFIG_OF_LIBFDT
>   		debug("using: FDT\n");
>   		if (image_setup_linux(images)) {
>   			printf("FDT creation failed! hanging...");
>   			hang();
>   		}
> -#endif
>   	} else {
>   		printf("Device tree not found or missing FDT support\n");
>   		hang();

Applied.
M
-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs



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