[PATCH 2/4] MIPS: remove CONFIG_SYS_MHZ

Stefan Roese sr at denx.de
Mon Jul 18 10:11:29 CEST 2022


On 10.07.22 17:15, Daniel Schwierzeck wrote:
> Resolve all uses of CONFIG_SYS_MHZ with the currently defined value.
> Remove code which depends on CONFIG_SYS_MHZ but where no board configs
> actually use that code.
> 
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck at gmail.com>

Reviewed-by: Stefan Roese <sr at denx.de>

Thanks,
Stefan

> ---
> 
>   arch/mips/mach-jz47xx/include/mach/jz4780.h | 2 +-
>   arch/mips/mach-jz47xx/jz4780/pll.c          | 6 +-----
>   board/imgtec/ci20/ci20.c                    | 4 ----
>   include/configs/ap121.h                     | 3 +--
>   include/configs/ap143.h                     | 3 +--
>   include/configs/ap152.h                     | 3 +--
>   include/configs/ci20.h                      | 3 +--
>   include/configs/malta.h                     | 3 +--
>   include/configs/tplink_wdr4300.h            | 3 +--
>   scripts/config_whitelist.txt                | 1 -
>   10 files changed, 8 insertions(+), 23 deletions(-)
> 
> diff --git a/arch/mips/mach-jz47xx/include/mach/jz4780.h b/arch/mips/mach-jz47xx/include/mach/jz4780.h
> index 4422e503ed..880445dac3 100644
> --- a/arch/mips/mach-jz47xx/include/mach/jz4780.h
> +++ b/arch/mips/mach-jz47xx/include/mach/jz4780.h
> @@ -60,7 +60,7 @@
>   
>   /* PLL setup */
>   #define JZ4780_SYS_EXTAL	48000000
> -#define JZ4780_SYS_MEM_SPEED	(CONFIG_SYS_MHZ * 1000000)
> +#define JZ4780_SYS_MEM_SPEED	(1200 * 1000000)
>   #define JZ4780_SYS_MEM_DIV	3
>   #define JZ4780_SYS_AUDIO_SPEED	(768 * 1000000)
>   
> diff --git a/arch/mips/mach-jz47xx/jz4780/pll.c b/arch/mips/mach-jz47xx/jz4780/pll.c
> index 323c634fb3..4519b478cc 100644
> --- a/arch/mips/mach-jz47xx/jz4780/pll.c
> +++ b/arch/mips/mach-jz47xx/jz4780/pll.c
> @@ -399,11 +399,7 @@ static void cpu_mux_select(int pll)
>   			((2 - 1) << CPM_CPCCR_L2DIV_BIT) |
>   			((1 - 1) << CPM_CPCCR_CDIV_BIT);
>   
> -	if (CONFIG_SYS_MHZ >= 1000)
> -		clk_ctrl |= (12 - 1) << CPM_CPCCR_PDIV_BIT;
> -	else
> -		clk_ctrl |= (6 - 1) << CPM_CPCCR_PDIV_BIT;
> -
> +	clk_ctrl |= (12 - 1) << CPM_CPCCR_PDIV_BIT;
>   	clrsetbits_le32(cpm_regs + CPM_CPCCR, 0x00ffffff, clk_ctrl);
>   
>   	while (readl(cpm_regs + CPM_CPCSR) & (CPM_CPCSR_CDIV_BUSY |
> diff --git a/board/imgtec/ci20/ci20.c b/board/imgtec/ci20/ci20.c
> index 7cbe49abd9..89f5e7ad79 100644
> --- a/board/imgtec/ci20/ci20.c
> +++ b/board/imgtec/ci20/ci20.c
> @@ -350,10 +350,6 @@ static const struct jz4780_ddr_config H5TQ2G83CFR_48_config = {
>   	.pulldn = 0x0e,
>   };
>   
> -#if (CONFIG_SYS_MHZ != 1200)
> -#error No DDR configuration for CPU speed
> -#endif
> -
>   const struct jz4780_ddr_config *jz4780_get_ddr_config(void)
>   {
>   	const int board_revision = ci20_revision();
> diff --git a/include/configs/ap121.h b/include/configs/ap121.h
> index 099aac5421..61cc073a8a 100644
> --- a/include/configs/ap121.h
> +++ b/include/configs/ap121.h
> @@ -6,8 +6,7 @@
>   #ifndef __CONFIG_H
>   #define __CONFIG_H
>   
> -#define CONFIG_SYS_MHZ                  200
> -#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
> +#define CONFIG_SYS_MIPS_TIMER_FREQ      200000000
>   
>   #define CONFIG_SYS_SDRAM_BASE           0x80000000
>   
> diff --git a/include/configs/ap143.h b/include/configs/ap143.h
> index 60b9e779fa..579b9b4f2c 100644
> --- a/include/configs/ap143.h
> +++ b/include/configs/ap143.h
> @@ -6,8 +6,7 @@
>   #ifndef __CONFIG_H
>   #define __CONFIG_H
>   
> -#define CONFIG_SYS_MHZ                  325
> -#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
> +#define CONFIG_SYS_MIPS_TIMER_FREQ      325000000
>   
>   #define CONFIG_SYS_SDRAM_BASE           0x80000000
>   
> diff --git a/include/configs/ap152.h b/include/configs/ap152.h
> index d165ead7bb..283762fd22 100644
> --- a/include/configs/ap152.h
> +++ b/include/configs/ap152.h
> @@ -6,8 +6,7 @@
>   #ifndef __CONFIG_H
>   #define __CONFIG_H
>   
> -#define CONFIG_SYS_MHZ                  375
> -#define CONFIG_SYS_MIPS_TIMER_FREQ      (CONFIG_SYS_MHZ * 1000000)
> +#define CONFIG_SYS_MIPS_TIMER_FREQ      375000000
>   
>   #define CONFIG_SYS_SDRAM_BASE           0x80000000
>   
> diff --git a/include/configs/ci20.h b/include/configs/ci20.h
> index 192da015e1..7e8a9fcb80 100644
> --- a/include/configs/ci20.h
> +++ b/include/configs/ci20.h
> @@ -10,8 +10,7 @@
>   #define __CONFIG_CI20_H__
>   
>   /* Ingenic JZ4780 clock configuration. */
> -#define CONFIG_SYS_MHZ			1200
> -#define CONFIG_SYS_MIPS_TIMER_FREQ	(CONFIG_SYS_MHZ * 1000000)
> +#define CONFIG_SYS_MIPS_TIMER_FREQ	1200000000
>   
>   /* Memory configuration */
>   #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
> diff --git a/include/configs/malta.h b/include/configs/malta.h
> index c8b230ab21..717867d12a 100644
> --- a/include/configs/malta.h
> +++ b/include/configs/malta.h
> @@ -18,8 +18,7 @@
>   /*
>    * CPU Configuration
>    */
> -#define CONFIG_SYS_MHZ			250	/* arbitrary value */
> -#define CONFIG_SYS_MIPS_TIMER_FREQ	(CONFIG_SYS_MHZ * 1000000)
> +#define CONFIG_SYS_MIPS_TIMER_FREQ	250000000
>   
>   /*
>    * Memory map
> diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h
> index f5466fd509..1400a211e3 100644
> --- a/include/configs/tplink_wdr4300.h
> +++ b/include/configs/tplink_wdr4300.h
> @@ -6,8 +6,7 @@
>   #ifndef __CONFIG_H
>   #define __CONFIG_H
>   
> -#define CONFIG_SYS_MHZ			280
> -#define CONFIG_SYS_MIPS_TIMER_FREQ	(CONFIG_SYS_MHZ * 1000000)
> +#define CONFIG_SYS_MIPS_TIMER_FREQ	280000000
>   
>   #define CONFIG_SYS_SDRAM_BASE		0xa0000000
>   
> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
> index f4ae48d265..5f4972ab95 100644
> --- a/scripts/config_whitelist.txt
> +++ b/scripts/config_whitelist.txt
> @@ -1024,7 +1024,6 @@ CONFIG_SYS_MEMORY_SIZE
>   CONFIG_SYS_MEM_RESERVE_SECURE
>   CONFIG_SYS_MEM_SIZE
>   CONFIG_SYS_MFD
> -CONFIG_SYS_MHZ
>   CONFIG_SYS_MIPS_TIMER_FREQ
>   CONFIG_SYS_MMC_CD_PIN
>   CONFIG_SYS_MMC_CLK_OD

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr at denx.de


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