[PATCH 16/20] Convert CONFIG_FSL_CORENET to Kconfig

Tom Rini trini at konsulko.com
Sat Jul 23 19:05:08 CEST 2022 

This converts the following to Kconfig:
   CONFIG_FSL_CORENET

Signed-off-by: Tom Rini <trini at konsulko.com>
---
 arch/powerpc/cpu/mpc85xx/Kconfig          | 18 +++++++++++++++++-
 arch/powerpc/include/asm/config_mpc85xx.h |  9 ---------
 configs/P2041RDB_NAND_defconfig           |  1 -
 configs/P2041RDB_SDCARD_defconfig         |  1 -
 configs/P2041RDB_SPIFLASH_defconfig       |  1 -
 configs/P2041RDB_defconfig                |  1 -
 configs/P3041DS_NAND_defconfig            |  1 -
 configs/P3041DS_SDCARD_defconfig          |  1 -
 configs/P3041DS_SPIFLASH_defconfig        |  1 -
 configs/P3041DS_defconfig                 |  1 -
 configs/P4080DS_SDCARD_defconfig          |  1 -
 configs/P4080DS_SPIFLASH_defconfig        |  1 -
 configs/P4080DS_defconfig                 |  1 -
 configs/P5040DS_NAND_defconfig            |  1 -
 configs/P5040DS_SDCARD_defconfig          |  1 -
 configs/P5040DS_SPIFLASH_defconfig        |  1 -
 configs/P5040DS_defconfig                 |  1 -
 configs/T1024RDB_NAND_defconfig           |  1 -
 configs/T1024RDB_SDCARD_defconfig         |  1 -
 configs/T1024RDB_SPIFLASH_defconfig       |  1 -
 configs/T1024RDB_defconfig                |  1 -
 configs/T1042D4RDB_NAND_defconfig         |  1 -
 configs/T1042D4RDB_SDCARD_defconfig       |  1 -
 configs/T1042D4RDB_SPIFLASH_defconfig     |  1 -
 configs/T1042D4RDB_defconfig              |  1 -
 configs/T2080QDS_NAND_defconfig           |  1 -
 configs/T2080QDS_SDCARD_defconfig         |  1 -
 configs/T2080QDS_SECURE_BOOT_defconfig    |  1 -
 configs/T2080QDS_SPIFLASH_defconfig       |  1 -
 configs/T2080QDS_SRIO_PCIE_BOOT_defconfig |  1 -
 configs/T2080QDS_defconfig                |  1 -
 configs/T2080RDB_NAND_defconfig           |  1 -
 configs/T2080RDB_SDCARD_defconfig         |  1 -
 configs/T2080RDB_SPIFLASH_defconfig       |  1 -
 configs/T2080RDB_defconfig                |  1 -
 configs/T2080RDB_revD_NAND_defconfig      |  1 -
 configs/T2080RDB_revD_SDCARD_defconfig    |  1 -
 configs/T2080RDB_revD_SPIFLASH_defconfig  |  1 -
 configs/T2080RDB_revD_defconfig           |  1 -
 configs/T4240RDB_SDCARD_defconfig         |  1 -
 configs/T4240RDB_defconfig                |  1 -
 configs/kmcent2_defconfig                 |  1 -
 include/configs/kmcent2.h                 |  1 -
 43 files changed, 17 insertions(+), 51 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index b6881bf1ff39..df7525d843c2 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -101,6 +101,7 @@ config TARGET_P2041RDB
 	bool "Support P2041RDB"
 	select ARCH_P2041
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
+	select FSL_CORENET
 	select PHYS_64BIT
 	imply CMD_SATA
 	imply FSL_SATA
@@ -180,6 +181,7 @@ config TARGET_KMP204X
 config TARGET_KMCENT2
 	bool "Support kmcent2"
 	select VENDOR_KM
+	select FSL_CORENET
 
 endchoice
 
@@ -187,6 +189,7 @@ config ARCH_B4420
 	bool
 	select E500MC
 	select E6500
+	select FSL_CORENET
 	select FSL_LAW
 	select HETROGENOUS_CLUSTERS
 	select SYS_FSL_DDR_VER_47
@@ -215,6 +218,7 @@ config ARCH_B4860
 	bool
 	select E500MC
 	select E6500
+	select FSL_CORENET
 	select FSL_LAW
 	select HETROGENOUS_CLUSTERS
 	select SYS_FSL_DDR_VER_47
@@ -554,6 +558,7 @@ config ARCH_P3041
 	bool
 	select BACKSIDE_L2_CACHE
 	select E500MC
+	select FSL_CORENET
 	select FSL_LAW
 	select SYS_CACHE_SHIFT_6
 	select SYS_FSL_DDR_VER_44
@@ -585,6 +590,7 @@ config ARCH_P4080
 	bool
 	select BACKSIDE_L2_CACHE
 	select E500MC
+	select FSL_CORENET
 	select FSL_LAW
 	select SYS_CACHE_SHIFT_6
 	select SYS_FSL_DDR_VER_44
@@ -625,6 +631,7 @@ config ARCH_P5040
 	bool
 	select BACKSIDE_L2_CACHE
 	select E500MC
+	select FSL_CORENET
 	select FSL_LAW
 	select SYS_CACHE_SHIFT_6
 	select SYS_FSL_DDR_VER_44
@@ -657,6 +664,7 @@ config ARCH_T1024
 	select BACKSIDE_L2_CACHE
 	select E500MC
 	select E5500
+	select FSL_CORENET
 	select FSL_LAW
 	select SYS_CACHE_SHIFT_6
 	select SYS_FSL_DDR_VER_50
@@ -682,6 +690,7 @@ config ARCH_T1040
 	select BACKSIDE_L2_CACHE
 	select E500MC
 	select E5500
+	select FSL_CORENET
 	select FSL_LAW
 	select SYS_CACHE_SHIFT_6
 	select SYS_FSL_DDR_VER_50
@@ -707,6 +716,7 @@ config ARCH_T1042
 	select BACKSIDE_L2_CACHE
 	select E500MC
 	select E5500
+	select FSL_CORENET
 	select FSL_LAW
 	select SYS_CACHE_SHIFT_6
 	select SYS_FSL_DDR_VER_50
@@ -731,6 +741,7 @@ config ARCH_T2080
 	bool
 	select E500MC
 	select E6500
+	select FSL_CORENET
 	select FSL_LAW
 	select SYS_CACHE_SHIFT_6
 	select SYS_FSL_DDR_VER_47
@@ -761,6 +772,7 @@ config ARCH_T4240
 	bool
 	select E500MC
 	select E6500
+	select FSL_CORENET
 	select FSL_LAW
 	select SYS_CACHE_SHIFT_6
 	select SYS_FSL_DDR_VER_47
@@ -1221,6 +1233,10 @@ config SYS_BOOK3E_HV
 	bool "Category E.HV is supported"
 	depends on BOOKE
 
+config FSL_CORENET
+	bool
+	select SYS_FSL_CPC
+
 config SYS_CPC_REINIT_F
 	bool
 	help
@@ -1228,7 +1244,7 @@ config SYS_CPC_REINIT_F
 	  required to be re-initialized.
 
 config SYS_FSL_CPC
-	bool "Corenet Platform Cache support"
+	bool
 
 config SYS_CACHE_STASHING
 	bool "Enable cache stashing"
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 1dcbe0670b62..169c91ca9e4f 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -74,7 +74,6 @@
 #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM	2
 
 #elif defined(CONFIG_ARCH_P2041) /* also supports P2040 */
-#define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	2
 #define CONFIG_SYS_NUM_FMAN		1
 #define CONFIG_SYS_NUM_FM1_DTSEC	5
@@ -91,7 +90,6 @@
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
 #elif defined(CONFIG_ARCH_P3041)
-#define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	2
 #define CONFIG_SYS_NUM_FMAN		1
 #define CONFIG_SYS_NUM_FM1_DTSEC	5
@@ -108,7 +106,6 @@
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
 #elif defined(CONFIG_ARCH_P4080) /* also supports P4040 */
-#define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	4
 #define CONFIG_SYS_NUM_FMAN		2
 #define CONFIG_SYS_NUM_FM1_DTSEC	4
@@ -126,7 +123,6 @@
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000
 
 #elif defined(CONFIG_ARCH_P5040)
-#define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	3
 #define CONFIG_SYS_NUM_FMAN		2
 #define CONFIG_SYS_NUM_FM1_DTSEC	5
@@ -160,7 +156,6 @@
 #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.2"
 
 #elif defined(CONFIG_ARCH_T4240)
-#define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
 #ifdef CONFIG_ARCH_T4240
@@ -196,7 +191,6 @@
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 
 #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
-#define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
 #define CONFIG_SYS_FSL_SRDS_1
 #define CONFIG_SYS_FSL_SRDS_2
@@ -231,7 +225,6 @@
 #endif
 
 #elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
-#define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	2
@@ -256,7 +249,6 @@
 #define QE_NUM_OF_SNUM			28
 
 #elif defined(CONFIG_ARCH_T1024)
-#define CONFIG_FSL_CORENET	     /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3	 /* QMAN version 3 */
 #define CONFIG_SYS_FSL_NUM_CC_PLL	2
@@ -281,7 +273,6 @@
 #define QE_NUM_OF_SNUM			28
 
 #elif defined(CONFIG_ARCH_T2080)
-#define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	2
 #define CONFIG_SYS_FSL_QMAN_V3
diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 1540e90a1ff3..da15a1cdb56e 100644
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index c1c249ddc17b..96be038967d8 100644
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 32761cd8990d..91f0ac56981b 100644
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 312396c8eacb..78398207e5ba 100644
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index ea76795c38fb..dd399466728a 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index fa49232d341b..bff11680216a 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 145f3260a905..a0b55b0bb95d 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 679887bd4e43..2eb1f7f951b3 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index c9313ede668e..35945812a7c8 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index ca85b0c45583..0d27e49c8ddb 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index 4f51df3645d5..ef75108eb977 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index 0bc8fd995e9c..cf2d5de9547c 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index 412fcb22cba8..81f04aecf22a 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 7a1a72fb5d8d..fd28f3d8c775 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index f808516fdb07..5933485c65b1 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 683a114551f2..1140bc0aecbf 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index d954574574b2..05c43311b1d8 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -15,7 +15,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 769de718508a..8c82ee8afa22 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -17,7 +17,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index aaadb88ebdf4..700bbd98af99 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_T1024RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 8f227294fd51..200536a7fb0d 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 7b502a9bc4e1..281cc7169b9c 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 42659cd1287d..c7b337a66813 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 48a734d0bac9..4983a5223183 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T1042D4RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index dca3b3eb87ec..30669d88e84c 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index 192f7b729de4..17629f13498b 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index 0023ffc2af4f..4c62d9316d21 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -7,7 +7,6 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_NXP_ESBC=y
 CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 81c8e3fc8796..f68c87411e7b 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index 16563ea8afce..ef29f474c94f 100644
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SRIO_PCIE_BOOT_SLAVE=y
 CONFIG_PCIE1=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index b106f0c1d334..62263b2fd4da 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 143b23015ebf..a1db4a4bf8fa 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 488b7d28c924..6e9c70822221 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 3c11b130f5e4..719f022e8b07 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index b4ddc46cf860..1117c015eeac 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index 1f32cf4284aa..10991e196469 100644
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index 3aa70a24eaa5..0aa715dcac36 100644
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index 8f3f1f1c51d5..07114a07c20b 100644
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
index 25f001e77b85..99b9c7931772 100644
--- a/configs/T2080RDB_revD_defconfig
+++ b/configs/T2080RDB_revD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_T2080RDB_REV_D=y
 CONFIG_PCIE1=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index f0d426866ae1..df3b5f3bc6fb 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 9c7a4b2c7c99..dc73dcdc1df6 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T4240RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index 08b174dd323e..dcc0b2987d1b 100644
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -12,7 +12,6 @@ CONFIG_TARGET_KMCENT2=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 # CONFIG_DEEP_SLEEP is not set
 CONFIG_PCIE1=y
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 348133c2c70d..589ba615dd6d 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -133,7 +133,6 @@
 #define KM_I2C_DEBLOCK_SDA	21
 
 /* High Level Configuration Options */
-#define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_RESET_VECTOR_ADDRESS	0xebfffffc
 
-- 
2.25.1

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