[PATCH 20/20] Convert CONFIG_SYS_FSL_DDR_INTLV_256B to Kconfig

Tom Rini trini at konsulko.com
Sat Jul 23 19:05:12 CEST 2022 

This converts the following to Kconfig:
   CONFIG_SYS_FSL_DDR_INTLV_256B

Signed-off-by: Tom Rini <trini at konsulko.com>
---
 README                                         | 5 -----
 configs/ls2080aqds_SECURE_BOOT_defconfig       | 1 +
 configs/ls2080aqds_defconfig                   | 1 +
 configs/ls2080aqds_nand_defconfig              | 1 +
 configs/ls2080aqds_qspi_defconfig              | 1 +
 configs/ls2080aqds_sdcard_defconfig            | 1 +
 configs/ls2080ardb_SECURE_BOOT_defconfig       | 1 +
 configs/ls2080ardb_defconfig                   | 1 +
 configs/ls2080ardb_nand_defconfig              | 1 +
 configs/ls2081ardb_defconfig                   | 1 +
 configs/ls2088aqds_tfa_defconfig               | 1 +
 configs/ls2088ardb_qspi_SECURE_BOOT_defconfig  | 1 +
 configs/ls2088ardb_qspi_defconfig              | 1 +
 configs/ls2088ardb_tfa_SECURE_BOOT_defconfig   | 1 +
 configs/ls2088ardb_tfa_defconfig               | 1 +
 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig   | 1 +
 configs/lx2160aqds_tfa_defconfig               | 1 +
 configs/lx2160ardb_tfa_SECURE_BOOT_defconfig   | 1 +
 configs/lx2160ardb_tfa_defconfig               | 1 +
 configs/lx2160ardb_tfa_stmm_defconfig          | 1 +
 configs/lx2162aqds_tfa_SECURE_BOOT_defconfig   | 1 +
 configs/lx2162aqds_tfa_defconfig               | 1 +
 configs/lx2162aqds_tfa_verified_boot_defconfig | 1 +
 drivers/ddr/fsl/Kconfig                        | 7 +++++++
 include/configs/ls2080a_common.h               | 2 --
 include/configs/lx2160a_common.h               | 1 -
 26 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/README b/README
index 3fe6d02d1ffd..aae30ef9cb61 100644
--- a/README
+++ b/README
@@ -434,11 +434,6 @@ The following options need to be configured:
 		same as CONFIG_SYS_DDR_SDRAM_BASE for  all Power SoCs. But
 		it could be different for ARM SoCs.
 
-		CONFIG_SYS_FSL_DDR_INTLV_256B
-		DDR controller interleaving on 256-byte. This is a special
-		interleaving mode, handled by Dickens for Freescale layerscape
-		SoCs with ARM core.
-
 		CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
 		Number of controllers used as main memory.
 
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index a4143871cb24..afb4e48e7e85 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -56,6 +56,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index 91b52265851a..15dadeb4e420 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -59,6 +59,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index 7d3cce0751b0..9fc1801c15da 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -79,6 +79,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 6bb37819c17e..d2dd95ea792d 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -60,6 +60,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index e2710b8ec788..e2e4cfdd9364 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -74,6 +74,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 1d0aea08b4a8..5378876f11b9 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -60,6 +60,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index ec6869cf5477..6570a466e0c5 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -63,6 +63,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index fa929ac4dab0..7c87f890c2c2 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -83,6 +83,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig
index e6e6fe6efc68..a426d6d48fb1 100644
--- a/configs/ls2081ardb_defconfig
+++ b/configs/ls2081ardb_defconfig
@@ -61,6 +61,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig
index 2a7cbd3a1bbe..f082fa52bcc5 100644
--- a/configs/ls2088aqds_tfa_defconfig
+++ b/configs/ls2088aqds_tfa_defconfig
@@ -66,6 +66,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
index 5d9c48b13979..1972fc908f54 100644
--- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
@@ -56,6 +56,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig
index 0628cc274d7a..dedc191edc06 100644
--- a/configs/ls2088ardb_qspi_defconfig
+++ b/configs/ls2088ardb_qspi_defconfig
@@ -63,6 +63,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
index 5fb13460549a..1674a2ce0916 100644
--- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
@@ -61,6 +61,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig
index bf9a016c7e6a..071db6b1d2e4 100644
--- a/configs/ls2088ardb_tfa_defconfig
+++ b/configs/ls2088ardb_tfa_defconfig
@@ -68,6 +68,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 21c60524f4d6..84aea7fb17cf 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -61,6 +61,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index 62b214bc0b18..7fce30b3311e 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -68,6 +68,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 65e43bf74699..42efefa41630 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -59,6 +59,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index 8cdebc808e0e..85ee4ca84589 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -67,6 +67,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig
index c7e9afe0a2dd..547c8682e55c 100644
--- a/configs/lx2160ardb_tfa_stmm_defconfig
+++ b/configs/lx2160ardb_tfa_stmm_defconfig
@@ -67,6 +67,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
index ca70f8b5cca1..421008489bdf 100644
--- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
@@ -63,6 +63,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig
index 68cdefb52e4e..dd1c0760987d 100644
--- a/configs/lx2162aqds_tfa_defconfig
+++ b/configs/lx2162aqds_tfa_defconfig
@@ -70,6 +70,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig
index ee3134e80c90..70faef837209 100644
--- a/configs/lx2162aqds_tfa_verified_boot_defconfig
+++ b/configs/lx2162aqds_tfa_verified_boot_defconfig
@@ -71,6 +71,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index d93ed8d2feb6..22400a9b8bab 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -182,6 +182,13 @@ config SYS_DDR_RAW_TIMING
 	  timing parameters are extracted from datasheet and hard-coded into
 	  header files or board specific files.
 
+config SYS_FSL_DDR_INTLV_256B
+	bool "Enforce 256-byte interleave"
+	help
+	  DDR controller interleaving on 256-byte. This is a special
+	  interleaving mode, handled by Dickens for Freescale layerscape SoCs
+	  with ARM core.
+
 endif
 
 menu "PowerPC / M68K initial memory controller definitions (FLASH, SDRAM, etc)"
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 3e86d1bff215..ba5af6c34d34 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -16,8 +16,6 @@
 
 /* Link Definitions */
 
-#define CONFIG_SYS_FSL_DDR_INTLV_256B	/* force 256 byte interleaving */
-
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000UL
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	0
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 0f5b0444e70f..61870717e8e1 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -13,7 +13,6 @@
 #define CONFIG_SYS_FLASH_BASE		0x20000000
 
 /* DDR */
-#define CONFIG_SYS_FSL_DDR_INTLV_256B	/* force 256 byte interleaving */
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE		0x80000000UL
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	0
-- 
2.25.1

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