[PATCH v3 6/8] RAM: Add changes for i.MXRT11xx series

Jesse Taube mr.bossman075 at gmail.com
Tue Jul 26 07:43:44 CEST 2022


The i.MXRT11 series has different offsets for IOCR_MUX, it also can
address 64MiB of SDRAM so add a macro for that.

Signed-off-by: Jesse Taube <Mr.Bossman075 at gmail.com>
---
V1 -> V2:
* Nothing done
V2 -> V3:
* Nothing done
---
 drivers/ram/imxrt_sdram.c                | 9 +++++++++
 include/dt-bindings/memory/imxrt-sdram.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/ram/imxrt_sdram.c b/drivers/ram/imxrt_sdram.c
index ca2eec767d..d0a88845cf 100644
--- a/drivers/ram/imxrt_sdram.c
+++ b/drivers/ram/imxrt_sdram.c
@@ -87,12 +87,21 @@ struct imxrt_semc_regs {
 	u32 sts[16];
 };
 
+#if !defined(TARGET_IMXRT1170_EVK)
 #define SEMC_IOCR_MUX_A8_SHIFT		0
 #define SEMC_IOCR_MUX_CSX0_SHIFT	3
 #define SEMC_IOCR_MUX_CSX1_SHIFT	6
 #define SEMC_IOCR_MUX_CSX2_SHIFT	9
 #define SEMC_IOCR_MUX_CSX3_SHIFT	12
 #define SEMC_IOCR_MUX_RDY_SHIFT		15
+#else
+#define SEMC_IOCR_MUX_A8_SHIFT		0
+#define SEMC_IOCR_MUX_CSX0_SHIFT	4
+#define SEMC_IOCR_MUX_CSX1_SHIFT	8
+#define SEMC_IOCR_MUX_CSX2_SHIFT	12
+#define SEMC_IOCR_MUX_CSX3_SHIFT	16
+#define SEMC_IOCR_MUX_RDY_SHIFT		20
+#endif
 
 struct imxrt_sdram_mux {
 	u8 a8;
diff --git a/include/dt-bindings/memory/imxrt-sdram.h b/include/dt-bindings/memory/imxrt-sdram.h
index acb35bce27..4b3b0c2f50 100644
--- a/include/dt-bindings/memory/imxrt-sdram.h
+++ b/include/dt-bindings/memory/imxrt-sdram.h
@@ -82,6 +82,7 @@
 
 #define MEM_WIDTH_8BITS		0x0
 #define MEM_WIDTH_16BITS	0x1
+#define MEM_WIDTH_32BITS	0x2
 
 #define BL_1			0x0
 #define BL_2			0x1
-- 
2.36.1



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