[PATCH 2/5] arm: bcmbca: add bcm6846 SoC support
William Zhang
william.zhang at broadcom.com
Fri Jul 29 21:48:44 CEST 2022
BCM6846 is an ARM A7 based PON Broadband SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux with minor fix-up that needs to be
upstreamed to linux as well.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there.
Signed-off-by: William Zhang <william.zhang at broadcom.com>
---
MAINTAINERS | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/bcm6846.dtsi | 103 ++++++++++++++++++++++++++
arch/arm/dts/bcm96846.dts | 30 ++++++++
arch/arm/mach-bcmbca/Kconfig | 8 ++
arch/arm/mach-bcmbca/Makefile | 1 +
arch/arm/mach-bcmbca/bcm6846/Kconfig | 17 +++++
arch/arm/mach-bcmbca/bcm6846/Makefile | 5 ++
board/broadcom/bcmbca/Kconfig | 7 ++
configs/bcm96846_defconfig | 22 ++++++
include/configs/bcm96846.h | 12 +++
11 files changed, 208 insertions(+)
create mode 100644 arch/arm/dts/bcm6846.dtsi
create mode 100644 arch/arm/dts/bcm96846.dts
create mode 100644 arch/arm/mach-bcmbca/bcm6846/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm6846/Makefile
create mode 100644 configs/bcm96846_defconfig
create mode 100644 include/configs/bcm96846.h
diff --git a/MAINTAINERS b/MAINTAINERS
index a01d2b69b260..b0fde1cb7285 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -219,6 +219,7 @@ F: board/broadcom/bcmbca/
N: bcmbca
N: bcm[9]?47622
N: bcm[9]?63178
+N: bcm[9]?6846
ARM BROADCOM BCMSTB
M: Thomas Fitzsimmons <fitzsim at fitzsim.org>
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6628b1151fea..5300ae8b2a1c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1167,6 +1167,8 @@ dtb-$(CONFIG_BCM47622) += \
bcm947622.dtb
dtb-$(CONFIG_BCM63178) += \
bcm963178.dtb
+dtb-$(CONFIG_BCM6846) += \
+ bcm96846.dtb
dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb
dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb
diff --git a/arch/arm/dts/bcm6846.dtsi b/arch/arm/dts/bcm6846.dtsi
new file mode 100644
index 000000000000..8aa47a2583b2
--- /dev/null
+++ b/arch/arm/dts/bcm6846.dtsi
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ compatible = "brcm,bcm6846", "brcm,bcmbca";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CA7_0: cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ CA7_1: cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ arm,cpu-registers-not-fw-configured;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&CA7_0>, <&CA7_1>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi at 81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x81000000 0x8000>;
+
+ gic: interrupt-controller at 1000 {
+ compatible = "arm,cortex-a7-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus at ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xff800000 0x800000>;
+
+ uart0: serial at 640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x1b>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "refclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/dts/bcm96846.dts b/arch/arm/dts/bcm96846.dts
new file mode 100644
index 000000000000..c70ebccabc19
--- /dev/null
+++ b/arch/arm/dts/bcm96846.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6846.dtsi"
+
+/ {
+ model = "Broadcom BCM96846 Reference Board";
+ compatible = "brcm,bcm96846", "brcm,bcm6846", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index 99e26e4ab8c9..891ac30dbdce 100644
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -19,7 +19,15 @@ config BCM63178
select DM_SERIAL
select PL01X_SERIAL
+config BCM6846
+ bool "Support for Broadcom 6846 Family"
+ select SYS_ARCH_TIMER
+ select CPU_V7A
+ select DM_SERIAL
+ select BCM6345_SERIAL
+
source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
source "arch/arm/mach-bcmbca/bcm63178/Kconfig"
+source "arch/arm/mach-bcmbca/bcm6846/Kconfig"
endif
diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index fdcade6bfe1a..308730407212 100644
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -5,3 +5,4 @@
obj-$(CONFIG_BCM47622) += bcm47622/
obj-$(CONFIG_BCM63178) += bcm63178/
+obj-$(CONFIG_BCM6846) += bcm6846/
diff --git a/arch/arm/mach-bcmbca/bcm6846/Kconfig b/arch/arm/mach-bcmbca/bcm6846/Kconfig
new file mode 100644
index 000000000000..229ab88dbb0d
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6846/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM6846
+
+config TARGET_BCM96846
+ bool "Broadcom 6846 Reference Board"
+ depends on ARCH_BCMBCA
+
+config SYS_SOC
+ default "bcm6846"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif
diff --git a/arch/arm/mach-bcmbca/bcm6846/Makefile b/arch/arm/mach-bcmbca/bcm6846/Makefile
new file mode 100644
index 000000000000..beb979af7520
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6846/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj- += dummy.o
diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index 53846761b664..70ca38099fcf 100644
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -22,3 +22,10 @@ config SYS_CONFIG_NAME
default "bcm963178"
endif
+
+if TARGET_BCM96846
+
+config SYS_CONFIG_NAME
+ default "bcm96846"
+
+endif
diff --git a/configs/bcm96846_defconfig b/configs/bcm96846_defconfig
new file mode 100644
index 000000000000..364bb978c8f1
--- /dev/null
+++ b/configs/bcm96846_defconfig
@@ -0,0 +1,22 @@
+CONFIG_ARM=y
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM6846=y
+CONFIG_TARGET_BCM96846=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="bcm96846"
+CONFIG_IDENT_STRING=" Broadcom BCM6846"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y
diff --git a/include/configs/bcm96846.h b/include/configs/bcm96846.h
new file mode 100644
index 000000000000..72c588cbe8fc
--- /dev/null
+++ b/include/configs/bcm96846.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM96846_H
+#define __BCM96846_H
+
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+#define COUNTER_FREQUENCY 50000000
+
+#endif
--
2.37.1
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