[PATCH 12/13] Convert CONFIG_SYS_SPD_BUS_NUM to Kconfig

Tom Rini trini at konsulko.com
Wed Jun 15 18:03:54 CEST 2022


This converts the following to Kconfig:
   CONFIG_SYS_SPD_BUS_NUM

Signed-off-by: Tom Rini <trini at konsulko.com>
---
 README                                       | 5 -----
 configs/P1010RDB-PA_36BIT_NAND_defconfig     | 1 +
 configs/P1010RDB-PA_36BIT_NOR_defconfig      | 1 +
 configs/P1010RDB-PA_36BIT_SDCARD_defconfig   | 1 +
 configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 +
 configs/P1010RDB-PA_NAND_defconfig           | 1 +
 configs/P1010RDB-PA_NOR_defconfig            | 1 +
 configs/P1010RDB-PA_SDCARD_defconfig         | 1 +
 configs/P1010RDB-PA_SPIFLASH_defconfig       | 1 +
 configs/P1010RDB-PB_36BIT_NAND_defconfig     | 1 +
 configs/P1010RDB-PB_36BIT_NOR_defconfig      | 1 +
 configs/P1010RDB-PB_36BIT_SDCARD_defconfig   | 1 +
 configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 +
 configs/P1010RDB-PB_NAND_defconfig           | 1 +
 configs/P1010RDB-PB_NOR_defconfig            | 1 +
 configs/P1010RDB-PB_SDCARD_defconfig         | 1 +
 configs/P1010RDB-PB_SPIFLASH_defconfig       | 1 +
 configs/P1020RDB-PC_36BIT_NAND_defconfig     | 1 +
 configs/P1020RDB-PC_36BIT_SDCARD_defconfig   | 1 +
 configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
 configs/P1020RDB-PC_36BIT_defconfig          | 1 +
 configs/P1020RDB-PC_NAND_defconfig           | 1 +
 configs/P1020RDB-PC_SDCARD_defconfig         | 1 +
 configs/P1020RDB-PC_SPIFLASH_defconfig       | 1 +
 configs/P1020RDB-PC_defconfig                | 1 +
 configs/P1020RDB-PD_NAND_defconfig           | 1 +
 configs/P1020RDB-PD_SDCARD_defconfig         | 1 +
 configs/P1020RDB-PD_SPIFLASH_defconfig       | 1 +
 configs/P1020RDB-PD_defconfig                | 1 +
 configs/P2020RDB-PC_36BIT_NAND_defconfig     | 1 +
 configs/P2020RDB-PC_36BIT_SDCARD_defconfig   | 1 +
 configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
 configs/P2020RDB-PC_36BIT_defconfig          | 1 +
 configs/P2020RDB-PC_NAND_defconfig           | 1 +
 configs/P2020RDB-PC_SDCARD_defconfig         | 1 +
 configs/P2020RDB-PC_SPIFLASH_defconfig       | 1 +
 configs/P2020RDB-PC_defconfig                | 1 +
 configs/P3041DS_NAND_defconfig               | 1 +
 configs/P3041DS_SDCARD_defconfig             | 1 +
 configs/P3041DS_SPIFLASH_defconfig           | 1 +
 configs/P3041DS_defconfig                    | 1 +
 configs/P4080DS_SDCARD_defconfig             | 1 +
 configs/P4080DS_SPIFLASH_defconfig           | 1 +
 configs/P4080DS_defconfig                    | 1 +
 configs/P5040DS_NAND_defconfig               | 1 +
 configs/P5040DS_SDCARD_defconfig             | 1 +
 configs/P5040DS_SPIFLASH_defconfig           | 1 +
 configs/P5040DS_defconfig                    | 1 +
 drivers/ddr/Kconfig                          | 5 +++++
 include/configs/MPC8548CDS.h                 | 2 --
 include/configs/P1010RDB.h                   | 1 -
 include/configs/P2041RDB.h                   | 1 -
 include/configs/T102xRDB.h                   | 1 -
 include/configs/T104xRDB.h                   | 1 -
 include/configs/T208xQDS.h                   | 1 -
 include/configs/T208xRDB.h                   | 1 -
 include/configs/T4240RDB.h                   | 1 -
 include/configs/corenet_ds.h                 | 1 -
 include/configs/km/pg-wcom-ls102xa.h         | 1 -
 include/configs/kmcent2.h                    | 1 -
 include/configs/ls1021aqds.h                 | 1 -
 include/configs/ls1043aqds.h                 | 1 -
 include/configs/ls1043ardb.h                 | 2 --
 include/configs/ls1046aqds.h                 | 1 -
 include/configs/ls1046ardb.h                 | 1 -
 include/configs/ls1088aqds.h                 | 1 -
 include/configs/ls1088ardb.h                 | 1 -
 include/configs/ls2080aqds.h                 | 1 -
 include/configs/ls2080ardb.h                 | 1 -
 include/configs/lx2160a_common.h             | 1 -
 include/configs/novena.h                     | 1 -
 include/configs/p1_p2_rdb_pc.h               | 3 ---
 include/configs/socrates.h                   | 2 --
 include/configs/vf610twr.h                   | 1 -
 include/i2c.h                                | 3 ---
 75 files changed, 52 insertions(+), 38 deletions(-)

diff --git a/README b/README
index 017dc2c61da0..50a326a12426 100644
--- a/README
+++ b/README
@@ -1302,11 +1302,6 @@ The following options need to be configured:
 
 		will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
 
-		CONFIG_SYS_SPD_BUS_NUM
-
-		If defined, then this indicates the I2C bus number for DDR SPD.
-		If not defined, then U-Boot assumes that SPD is on I2C bus 0.
-
 		CONFIG_SYS_RTC_BUS_NUM
 
 		If defined, then this indicates the I2C bus number for the RTC.
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 3d25bb18e461..c8f7e405d45e 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -81,6 +81,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_TPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index 71368c2a99e1..8d999b6375d2 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -48,6 +48,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_COMMON_INIT_DDR=y
 CONFIG_SPL_COMMON_INIT_DDR=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index f7c028c68b2a..d9bf749bc505 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -70,6 +70,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 3f8b257094dc..d4c3899596b4 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -73,6 +73,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 471ec321c20e..dd08b8c9725f 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -80,6 +80,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_TPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index 592a1c2dfad9..92396208b273 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -47,6 +47,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_COMMON_INIT_DDR=y
 CONFIG_SPL_COMMON_INIT_DDR=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index 033461507ad0..85c0e83aee77 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -69,6 +69,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 2dcdc6ab42a8..5ead2a86eaff 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -72,6 +72,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index c86fedaf7cc9..b3a894d76c00 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -82,6 +82,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_TPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 25e986685eda..8bbff122f1c3 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -49,6 +49,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_COMMON_INIT_DDR=y
 CONFIG_SPL_COMMON_INIT_DDR=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 1843543db61a..9d2b55be8ec5 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -71,6 +71,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index bdb178bb868d..fb0a6cfb0216 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -74,6 +74,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 036d9a132ba4..380b6596843e 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -81,6 +81,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_TPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index c9392e95ff9b..4ce8b5e40eb3 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -48,6 +48,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_COMMON_INIT_DDR=y
 CONFIG_SPL_COMMON_INIT_DDR=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index 5a392bf17012..7c02d40aa246 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -70,6 +70,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 079b4d3df710..378a4e6f6091 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -73,6 +73,7 @@ CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index 3ed503f31e26..436bc1d64b26 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -79,6 +79,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 21493d433664..27d319048893 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -69,6 +69,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 89648f9b1cb8..a32afb126052 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -72,6 +72,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 9487256cfb11..b74ec9749fe2 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -48,6 +48,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index ae1a4e06fc47..76f7bc38bea7 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -78,6 +78,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 15d4e470e038..9cbf65b6dc22 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -68,6 +68,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 2493c77dfb89..9215acdf5e9f 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -71,6 +71,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index 944a692a438b..ebd83e5ecb18 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -47,6 +47,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 7084c9ef1767..5e2f3ccb86b3 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -81,6 +81,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 5caf1759c0fa..0e6531192503 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -71,6 +71,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index d2fa3e6f723a..f98fcd602ff9 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -74,6 +74,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index d6bafd1543c0..a1cffb7c8457 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -50,6 +50,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEC001001
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index bb68858ff3e1..48577ebb1fac 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -83,6 +83,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 743f488bb1f9..baeb62fa9224 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -73,6 +73,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 8fa421b3e8c7..61eb3bef5d8d 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -76,6 +76,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index 2b16989d1b73..0c926455fad4 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -52,6 +52,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 1712f6061df5..08bf6daee680 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -82,6 +82,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xFF800C21
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 67d9adc2299b..442ca23a7aef 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -72,6 +72,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 281c619a5dd4..a1ea8e570a2c 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -75,6 +75,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 594d6a8d4aa6..ddac11060a7a 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -51,6 +51,7 @@ CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y
 CONFIG_SYS_BR0_PRELIM=0xEF001001
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 6da4e06ff90a..9cf139f561c5 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -48,6 +48,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index 828896290e7f..223cd178111d 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -48,6 +48,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index ea2e1ebe9a12..ed0f7a1f295c 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -50,6 +50,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 627795235b1c..0a3937acca5e 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index 867f8aace4c6..e87d506e1b55 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -47,6 +47,7 @@ CONFIG_ETHPRIME="FM1 at DTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index 59984c916bce..4b17f3614da0 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -49,6 +49,7 @@ CONFIG_ETHPRIME="FM1 at DTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index 2733bb2cad98..5d6ffc5d1a31 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -44,6 +44,7 @@ CONFIG_ETHPRIME="FM1 at DTSEC1"
 CONFIG_DM=y
 CONFIG_LBA48=y
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index e7f9755efb87..dafb3ac2a0d5 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -49,6 +49,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index 32c1065c879c..083b2b39da66 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -48,6 +48,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 054f43e4c369..270c5545c05b 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -50,6 +50,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index 44abf8ff1063..6ae3f7b522d8 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM=y
 CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y
diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig
index eec9d480b096..738b7884012f 100644
--- a/drivers/ddr/Kconfig
+++ b/drivers/ddr/Kconfig
@@ -30,5 +30,10 @@ config DDR_SPD
 	  For memory controllers that can utilize it, add enable support for
 	  using the JEDEC SDP standard.
 
+config SYS_SPD_BUS_NUM
+	int "I2C bus number for DDR SPD"
+	depends on DDR_SPD || SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY
+	default 0
+
 source "drivers/ddr/altera/Kconfig"
 source "drivers/ddr/imx/Kconfig"
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 5fba5bb198dd..ce559e907c05 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -263,8 +263,6 @@
  */
 #if !CONFIG_IS_ENABLED(DM_I2C)
 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x69} }
-#else
-#define CONFIG_SYS_SPD_BUS_NUM 0
 #endif
 
 /* EEPROM */
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 53c719807d6c..94fa3174de30 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -110,7 +110,6 @@
 
 /* DDR Setup */
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_SYS_SPD_BUS_NUM		1
 #define SPD_EEPROM_ADDRESS		0x52
 
 #define CONFIG_MEM_INIT_VALUE		0xDeadBeef
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 8e5d18f6cca4..4e96d2a06b79 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -89,7 +89,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x52
 #define CONFIG_SYS_SDRAM_SIZE	4096	/* for fixed parameter use */
 
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 3f32354038e3..9d68f2568df4 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -126,7 +126,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 #if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x51
 #define CONFIG_SYS_SDRAM_SIZE	4096	/* for fixed parameter use */
 #elif defined(CONFIG_TARGET_T1023RDB)
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index bda252486213..f1738b32c5d6 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -106,7 +106,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x51
 
 #define CONFIG_SYS_SDRAM_SIZE	4096	/* for fixed parameter use */
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 0c13550ef234..eda03dad229a 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -95,7 +95,6 @@
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SPD_BUS_NUM	0
 #define CONFIG_SYS_SDRAM_SIZE	2048	/* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1	0x51
 #define SPD_EEPROM_ADDRESS2	0x52
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 5fb768ab92fc..290fd7cf744e 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -90,7 +90,6 @@
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SPD_BUS_NUM	0
 #define CONFIG_SYS_SDRAM_SIZE	2048	/* for fixed parameter use */
 #define SPD_EEPROM_ADDRESS1	0x51
 #define SPD_EEPROM_ADDRESS2	0x52
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 6f5b75942993..29447e4895ab 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -178,7 +178,6 @@
 /*
  * DDR Setup
  */
-#define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS1	0x52
 #define SPD_EEPROM_ADDRESS2	0x54
 #define SPD_EEPROM_ADDRESS3	0x56
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 034cd00381ef..51bc772e2386 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -92,7 +92,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_SPD_BUS_NUM	1
 #define SPD_EEPROM_ADDRESS1	0x51
 #define SPD_EEPROM_ADDRESS2	0x52
 #define SPD_EEPROM_ADDRESS	SPD_EEPROM_ADDRESS1	/* for p3041/p5010 */
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index 7430185666e7..3927558467af 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -22,7 +22,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_SPD_BUS_NUM		0
 #define SPD_EEPROM_ADDRESS		0x54
 
 /* POST memory regions test */
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 798688a220ba..3b4ddb0f94a5 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -171,7 +171,6 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_SPD_BUS_NUM	0
 #define SPD_EEPROM_ADDRESS	0x54
 #define CONFIG_SYS_SDRAM_SIZE	4096	/* for fixed parameter use */
 
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index e17bdcad6d04..dd389a9e16e8 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -23,7 +23,6 @@
 #endif
 
 #define SPD_EEPROM_ADDRESS		0x51
-#define CONFIG_SYS_SPD_BUS_NUM		0
 
 #ifndef CONFIG_SYS_FSL_DDR4
 #define CONFIG_SYS_DDR_RAW_TIMING
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 75d655c50d66..e81384ab3f00 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -13,7 +13,6 @@
 /* Physical Memory Map */
 
 #define SPD_EEPROM_ADDRESS		0x51
-#define CONFIG_SYS_SPD_BUS_NUM		0
 
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index edb4e64ee41a..f39a94065569 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -12,8 +12,6 @@
 
 /* Physical Memory Map */
 
-#define CONFIG_SYS_SPD_BUS_NUM		0
-
 #ifndef CONFIG_SPL
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 6271135db9fc..0e24209fbe9e 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -13,7 +13,6 @@
 /* Physical Memory Map */
 
 #define SPD_EEPROM_ADDRESS		0x51
-#define CONFIG_SYS_SPD_BUS_NUM		0
 
 #ifdef CONFIG_DDR_ECC
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 4ad62b43f8c9..fdd251abcd1a 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -14,7 +14,6 @@
 /* Physical Memory Map */
 
 #define SPD_EEPROM_ADDRESS		0x51
-#define CONFIG_SYS_SPD_BUS_NUM		0
 
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index e532c343f48b..7c60f287981a 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -16,7 +16,6 @@
 
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #define SPD_EEPROM_ADDRESS		0x51
-#define CONFIG_SYS_SPD_BUS_NUM		0
 
 
 /*
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index aeadf534bc32..c0567c3fe580 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -17,7 +17,6 @@
 
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
 #define SPD_EEPROM_ADDRESS	0x51
-#define CONFIG_SYS_SPD_BUS_NUM	0	/* SPD on I2C bus 0 */
 
 
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 96da4ab2ec08..a0e2127f1ddd 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -24,7 +24,6 @@
 #define SPD_EEPROM_ADDRESS5	0x55
 #define SPD_EEPROM_ADDRESS6	0x56	/* dummy address */
 #define SPD_EEPROM_ADDRESS	SPD_EEPROM_ADDRESS1
-#define CONFIG_SYS_SPD_BUS_NUM	0	/* SPD on I2C bus 0 */
 
 #define CONFIG_SYS_NOR0_CSPR_EXT	(0x0)
 #define CONFIG_SYS_NOR_AMASK		IFC_AMASK(128*1024*1024)
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 835fff4bc60b..9c4d2feb7883 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -29,7 +29,6 @@
 #define SPD_EEPROM_ADDRESS5	0x55
 #define SPD_EEPROM_ADDRESS6	0x56	/* dummy address */
 #define SPD_EEPROM_ADDRESS	SPD_EEPROM_ADDRESS1
-#define CONFIG_SYS_SPD_BUS_NUM	0	/* SPD on I2C bus 0 */
 
 #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT)
 
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 1669ecd2aba9..bc3a0046ac63 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -31,7 +31,6 @@
 #define SPD_EEPROM_ADDRESS5		0x55
 #define SPD_EEPROM_ADDRESS6		0x56
 #define SPD_EEPROM_ADDRESS		SPD_EEPROM_ADDRESS1
-#define CONFIG_SYS_SPD_BUS_NUM		0	/* SPD on I2C bus 0 */
 #define CONFIG_SYS_MONITOR_LEN		(936 * 1024)
 
 /* Miscellaneous configurable options */
diff --git a/include/configs/novena.h b/include/configs/novena.h
index ee39b3c297cb..9f18db465e10 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -39,7 +39,6 @@
 
 /* I2C */
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_SPD_BUS_NUM		0
 
 /* I2C EEPROM */
 
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index d368e90fb2bd..1e5467807053 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -116,7 +116,6 @@
 
 /* DDR Setup */
 #define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_SYS_SPD_BUS_NUM 1
 #define SPD_EEPROM_ADDRESS 0x52
 
 #if defined(CONFIG_TARGET_P1020RDB_PD)
@@ -355,8 +354,6 @@
 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x29} }
 #endif
 
-#define CONFIG_SYS_SPD_BUS_NUM		1 /* For rom_loc and flash bank */
-
 /*
  * I2C2 EEPROM
  */
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 73f82fc00aca..14f7bb9f7132 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -118,8 +118,6 @@
 #define CONFIG_SYS_LIME_BASE		0xc8000000
 #define CONFIG_SYS_LIME_SIZE		0x04000000	/* 64 MB	*/
 
-#define CONFIG_SYS_SPD_BUS_NUM 0
-
 /*
  * General PCI
  * Memory space is mapped 1-1.
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index 7f4bfb5124ac..32d9df0a00ce 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -26,7 +26,6 @@
 #define CONFIG_FEC_MXC_PHYADDR          0
 
 /* I2C Configs */
-#define CONFIG_SYS_SPD_BUS_NUM		0
 
 /*
  * We do have 128MB of memory on the Vybrid Tower board. Leave the last
diff --git a/include/i2c.h b/include/i2c.h
index 22add0b5282f..e0ee94e55046 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -647,9 +647,6 @@ void i2c_early_init_f(void);
 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
 #define CONFIG_SYS_RTC_BUS_NUM		0
 #endif
-#if !defined(CONFIG_SYS_SPD_BUS_NUM)
-#define CONFIG_SYS_SPD_BUS_NUM		0
-#endif
 
 struct i2c_adapter {
 	void		(*init)(struct i2c_adapter *adap, int speed,
-- 
2.25.1



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