[PATCH v5 3/4] ARM: dts: at91: sama5d2: add TCB node
Clément Léger
clement.leger at bootlin.com
Fri Mar 4 15:42:15 CET 2022
Le Fri, 4 Mar 2022 14:31:08 +0000,
<Eugen.Hristev at microchip.com> a écrit :
> On 3/4/22 1:05 PM, Clément Léger wrote:
> > Add the device-tree node to describe the TCB timer.
> >
> > Signed-off-by: Clément Léger <clement.leger at bootlin.com>
> > ---
> > arch/arm/dts/sama5d2.dtsi | 17 +++++++++++++++++
> > 1 file changed, 17 insertions(+)
> >
> > diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
> > index dee68dc022..9360c0008c 100644
> > --- a/arch/arm/dts/sama5d2.dtsi
> > +++ b/arch/arm/dts/sama5d2.dtsi
> > @@ -1,4 +1,5 @@
> > #include "skeleton.dtsi"
> > +#include <dt-bindings/interrupt-controller/irq.h>
> >
> > / {
> > model = "Atmel SAMA5D2 family SoC";
> > @@ -710,6 +711,22 @@
> > status = "disabled";
> > };
> >
> > + tcb0: timer at f800c000 {
> > + compatible = "atmel,sama5d2-tcb", "simple-mfd",
> > + "syscon";
>
> No need to line break the previous line. DT files can have more than 80
> chars per line, it's fine.
Ok, wasn't sure of that, found some of them that had these line breaks.
Good to know for next patches.
>
> If there are no other comments I will fix this when applying, no need to
> send a v6 for now.
Ok, thanks Eugen.
>
> > + reg = <0xf800c000 0x100>;
> > + interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
> > + clocks = <&tcb0_clk>, <&tcb0_gclk>, <&clk32k>;
> > + clock-names = "t0_clk", "gclk", "slow_clk";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + timer0: timer at 0 {
> > + compatible = "atmel,tcb-timer";
> > + reg = <0>, <1>;
> > + };
> > + };
> > +
> > watchdog at f8048040 {
> > compatible = "atmel,sama5d4-wdt";
> > reg = <0xf8048040 0x10>;
> > --
> > 2.34.1
> >
>
--
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com
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