[PATCH v2 2/2] ARM: dts: at91: sama7g5/sama7g5ek: align with Linux DT
Eugen Hristev
eugen.hristev at microchip.com
Mon Mar 7 13:55:10 CET 2022
Align the DT for sama7g5 SoC and sama7g5 EK board with Linux devicetree
in version 5.18.
Some things remain still different, due to some things yet unimplemented in
certain drivers. These include in PMC, pinctrl, and others.
Signed-off-by: Eugen Hristev <eugen.hristev at microchip.com>
---
arch/arm/dts/at91-sama7g5ek-u-boot.dtsi | 18 +-
arch/arm/dts/at91-sama7g5ek.dts | 727 +++++++++++++++---
arch/arm/dts/sama7g5.dtsi | 942 ++++++++++++++++++++----
3 files changed, 1426 insertions(+), 261 deletions(-)
diff --git a/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
index 5e1a0d53a5..407c94406e 100644
--- a/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
+++ b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
@@ -14,12 +14,8 @@
u-boot,dm-pre-reloc;
};
- ahb {
+ soc {
u-boot,dm-pre-reloc;
-
- apb {
- u-boot,dm-pre-reloc;
- };
};
};
@@ -31,18 +27,18 @@
u-boot,dm-pre-reloc;
};
-&pioA {
+&pinctrl {
u-boot,dm-pre-reloc;
-
- pinctrl {
- u-boot,dm-pre-reloc;
- };
};
&pinctrl_flx3_default {
u-boot,dm-pre-reloc;
};
+&pioA {
+ u-boot,dm-pre-reloc;
+};
+
&pit64b0 {
u-boot,dm-pre-reloc;
};
@@ -59,7 +55,7 @@
u-boot,dm-pre-reloc;
};
-&uart0 {
+&uart3 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts
index ac6f23f64e..5313c6d160 100644
--- a/arch/arm/dts/at91-sama7g5ek.dts
+++ b/arch/arm/dts/at91-sama7g5ek.dts
@@ -1,69 +1,150 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * sama7g5ek.dts - Device Tree file for SAMA7G5 EK
- * SAMA7G5 Evaluation Kit
+ * at91-sama7g5ek.dts - Device Tree file for SAMA7G5-EK board
+ *
+ * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Eugen Hristev <eugen.hristev at microchip.com>
+ * Author: Claudiu Beznea <claudiu.beznea at microchip.com>
*
- * Copyright (c) 2020, Microchip Technology Inc.
- * 2020, Eugen Hristev <eugen.hristev at microchip.com>
- * 2020, Claudiu Beznea <claudiu.beznea at microchip.com>
*/
/dts-v1/;
-#include <dt-bindings/mfd/atmel-flexcom.h>
-#include "sama7g5.dtsi"
#include "sama7g5-pinfunc.h"
+#include "sama7g5.dtsi"
+#include <dt-bindings/mfd/atmel-flexcom.h>
+#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/at91.h>
/ {
- model = "Microchip SAMA7G5 Evaluation Kit";
- compatible = "microchip,sama7g5ek", "microchip,sama7g54", "microchip,sama7g5", "microchip,sama7";
+ model = "Microchip SAMA7G5-EK";
+ compatible = "microchip,sama7g5ek", "microchip,sama7g5", "microchip,sama7";
+
+ chosen {
+ bootargs = "rw root=/dev/mmcblk1p2 rootfstype=ext4 rootwait";
+ stdout-path = "serial0:115200n8";
+ };
aliases {
- serial0 = &uart0;
+ serial0 = &uart3;
+ serial1 = &uart4;
+ serial2 = &uart7;
+ serial3 = &uart0;
i2c0 = &i2c1;
i2c1 = &i2c8;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
+ i2c2 = &i2c9;
};
clocks {
- slow_xtal: slow_xtal {
+ slow_xtal {
clock-frequency = <32768>;
};
- main_xtal: main_xtal {
+ main_xtal {
clock-frequency = <24000000>;
};
};
- ahb {
+ gpio_keys {
+ compatible = "gpio-keys";
- apb {
- sdmmc0: sdio-host at e1204000 {
- bus-width = <8>;
- non-removable;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sdmmc0_cmd_data_default
- &pinctrl_sdmmc0_ck_rstn_ds_cd_default>;
- status = "okay";
- };
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_key_gpio_default>;
- sdmmc1: sdio-host at e1208000 {
- bus-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sdmmc1_cmd_data_default
- &pinctrl_sdmmc1_ck_cd_rstn_vddsel_default>;
- status = "okay";
- };
+ bp1 {
+ label = "PB_USER";
+ gpios = <&pioA PIN_PA12 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_PROG1>;
+ wakeup-source;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_led_gpio_default>;
+ status = "okay"; /* Conflict with pwm. */
+
+ red_led {
+ label = "red";
+ gpios = <&pioA PIN_PB8 GPIO_ACTIVE_HIGH>;
+ };
+
+ green_led {
+ label = "green";
+ gpios = <&pioA PIN_PA13 GPIO_ACTIVE_HIGH>;
+ };
+
+ blue_led {
+ label = "blue";
+ gpios = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ /* 512 M */
+ memory at 60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x20000000>;
+ };
- uart0: serial at e1824200 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flx3_default>;
- status = "okay";
+ sound: sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "sama7g5ek audio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ simple-audio-card,dai-link at 0 {
+ reg = <0>;
+ cpu {
+ sound-dai = <&spdiftx>;
+ };
+ codec {
+ sound-dai = <&spdif_out>;
+ };
+ };
+ simple-audio-card,dai-link at 1 {
+ reg = <1>;
+ cpu {
+ sound-dai = <&spdifrx>;
+ };
+ codec {
+ sound-dai = <&spdif_in>;
};
};
};
+
+ spdif_in: spdif-in {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dir";
+ };
+
+ spdif_out: spdif-out {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ };
+};
+
+&adc {
+ vddana-supply = <&vddout25>;
+ vref-supply = <&vddout25>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mikrobus1_an_default &pinctrl_mikrobus2_an_default>;
+ status = "okay";
+};
+
+&can0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can0_default>;
+ status = "okay";
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1_default>;
+ status = "okay";
+};
+
+&cpu0 {
+ cpu-supply = <&vddcpu>;
};
&qspi0 {
@@ -81,18 +162,233 @@
spi-rx-bus-width = <8>;
m25p,fast-read;
+ at91bootstrap at 0 {
+ label = "ospi: at91bootstrap";
+ reg = <0x0 0x40000>;
+ };
+
+ bootloader at 40000 {
+ label = "ospi: bootloader";
+ reg = <0x40000 0xc0000>;
+ };
+
+ bootloaderenvred at 100000 {
+ label = "ospi: bootloader env redundant";
+ reg = <0x100000 0x40000>;
+ };
+
+ bootloaderenv at 140000 {
+ label = "ospi: bootloader env";
+ reg = <0x140000 0x40000>;
+ };
+
+ dtb at 180000 {
+ label = "ospi: device tree";
+ reg = <0x180000 0x80000>;
+ };
+
+ kernel at 200000 {
+ label = "ospi: kernel";
+ reg = <0x200000 0x600000>;
+ };
+
+ rootfs at 800000 {
+ label = "ospi: rootfs";
+ reg = <0x800000 0x7800000>;
+ };
+
+ };
+};
+
+&dma0 {
+ status = "okay";
+};
+
+&dma1 {
+ status = "okay";
+};
+
+&dma2 {
+ status = "okay";
+};
+
+&flx0 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
+ status = "disabled";
+
+ uart0: serial at 200 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flx0_default>;
+ status = "disabled";
};
};
&flx1 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
+
+ i2c1: i2c at 600 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_default>;
+ i2c-analog-filter;
+ i2c-digital-filter;
+ i2c-digital-filter-width-ns = <35>;
+ status = "okay";
+
+ mcp16502 at 5b {
+ compatible = "microchip,mcp16502";
+ reg = <0x5b>;
+ status = "okay";
+
+ regulators {
+ vdd_3v3: VDD_IO {
+ regulator-name = "VDD_IO";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3700000>;
+ regulator-initial-mode = <2>;
+ regulator-allowed-modes = <2>, <4>;
+ regulator-always-on;
+
+ regulator-state-standby {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ regulator-mode = <4>;
+ };
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-mode = <4>;
+ };
+ };
+
+ vddioddr: VDD_DDR {
+ regulator-name = "VDD_DDR";
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1450000>;
+ regulator-initial-mode = <2>;
+ regulator-allowed-modes = <2>, <4>;
+ regulator-always-on;
+
+ regulator-state-standby {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1350000>;
+ regulator-mode = <4>;
+ };
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1350000>;
+ regulator-mode = <4>;
+ };
+ };
+
+ vddcore: VDD_CORE {
+ regulator-name = "VDD_CORE";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1850000>;
+ regulator-initial-mode = <2>;
+ regulator-allowed-modes = <2>, <4>;
+ regulator-always-on;
+
+ regulator-state-standby {
+ regulator-on-in-suspend;
+ regulator-suspend-voltage = <1150000>;
+ regulator-mode = <4>;
+ };
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-mode = <4>;
+ };
+ };
+
+ vddcpu: VDD_OTHER {
+ regulator-name = "VDD_OTHER";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1850000>;
+ regulator-initial-mode = <2>;
+ regulator-allowed-modes = <2>, <4>;
+ regulator-ramp-delay = <3125>;
+ regulator-always-on;
+
+ regulator-state-standby {
+ regulator-on-in-suspend;
+ regulator-suspend-voltage = <1050000>;
+ regulator-mode = <4>;
+ };
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-mode = <4>;
+ };
+ };
+
+ vldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3700000>;
+ regulator-always-on;
+
+ regulator-state-standby {
+ regulator-suspend-voltage = <1800000>;
+ regulator-on-in-suspend;
+ };
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vldo2: LDO2 {
+ regulator-name = "LDO2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3700000>;
+
+ regulator-state-standby {
+ regulator-suspend-voltage = <1800000>;
+ regulator-on-in-suspend;
+ };
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+ };
+};
+
+&flx3 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
+ status = "okay";
+
+ uart3: serial at 200 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flx3_default>;
+ status = "okay";
+ };
};
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flx1_default>;
+&flx4 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
status = "okay";
+
+ uart4: serial at 200 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flx4_default>;
+ status = "okay";
+ };
+};
+
+&flx7 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
+ status = "okay";
+
+ uart7: serial at 200 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flx7_default>;
+ status = "okay";
+ };
};
&flx8 {
@@ -121,18 +417,46 @@
};
};
+&flx9 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
+ status = "okay";
+
+ i2c9: i2c at 600 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c9_default>;
+ i2c-analog-filter;
+ i2c-digital-filter;
+ i2c-digital-filter-width-ns = <35>;
+ status = "okay";
+ };
+};
+
+&flx11 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
+ status = "okay";
+
+ spi11: spi at 400 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mikrobus1_spi &pinctrl_mikrobus1_spi_cs>;
+ status = "okay";
+ };
+};
+
&gmac0 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0_default
&pinctrl_gmac0_mdio_default
- &pinctrl_gmac0_txc_default>;
+ &pinctrl_gmac0_txck_default
+ &pinctrl_gmac0_phy_irq>;
phy-mode = "rgmii-id";
status = "okay";
ethernet-phy at 7 {
reg = <0x7>;
+ interrupt-parent = <&pioA>;
+ interrupts = <PIN_PA31 IRQ_TYPE_LEVEL_LOW>;
};
};
@@ -140,19 +464,43 @@
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gmac1_default &pinctrl_gmac1_mdio_default>;
+ pinctrl-0 = <&pinctrl_gmac1_default
+ &pinctrl_gmac1_mdio_default
+ &pinctrl_gmac1_phy_irq>;
phy-mode = "rmii";
status = "okay";
ethernet-phy at 0 {
reg = <0x0>;
+ interrupt-parent = <&pioA>;
+ interrupts = <PIN_PA21 IRQ_TYPE_LEVEL_LOW>;
};
};
-&pinctrl {
- pinctrl_flx1_default: flx1_default {
- pinmux = <PIN_PC9__FLEXCOM1_IO0>,
- <PIN_PC10__FLEXCOM1_IO1>;
+&i2s0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2s0_default>;
+};
+
+&pioA {
+
+ pinctrl_can0_default: can0_default {
+ pinmux = <PIN_PD12__CANTX0>,
+ <PIN_PD13__CANRX0 >;
+ bias-disable;
+ };
+
+ pinctrl_can1_default: can1_default {
+ pinmux = <PIN_PD14__CANTX1>,
+ <PIN_PD15__CANRX1 >;
+ bias-disable;
+ };
+
+ pinctrl_flx0_default: flx0_default {
+ pinmux = <PIN_PE3__FLEXCOM0_IO0>,
+ <PIN_PE4__FLEXCOM0_IO1>,
+ <PIN_PE6__FLEXCOM0_IO3>,
+ <PIN_PE7__FLEXCOM0_IO4>;
bias-disable;
};
@@ -162,12 +510,147 @@
bias-pull-up;
};
+ pinctrl_flx4_default: flx4_default {
+ pinmux = <PIN_PD18__FLEXCOM4_IO0>,
+ <PIN_PD19__FLEXCOM4_IO1>;
+ bias-disable;
+ };
+
+ pinctrl_flx7_default: flx7_default {
+ pinmux = <PIN_PC23__FLEXCOM7_IO0>,
+ <PIN_PC24__FLEXCOM7_IO1>;
+ bias-disable;
+ };
+
+ pinctrl_gmac0_default: gmac0_default {
+ pinmux = <PIN_PA16__G0_TX0>,
+ <PIN_PA17__G0_TX1>,
+ <PIN_PA26__G0_TX2>,
+ <PIN_PA27__G0_TX3>,
+ <PIN_PA19__G0_RX0>,
+ <PIN_PA20__G0_RX1>,
+ <PIN_PA28__G0_RX2>,
+ <PIN_PA29__G0_RX3>,
+ <PIN_PA15__G0_TXEN>,
+ <PIN_PA30__G0_RXCK>,
+ <PIN_PA18__G0_RXDV>,
+ <PIN_PA25__G0_125CK>;
+ slew-rate = <0>;
+ bias-disable;
+ };
+
+ pinctrl_gmac0_mdio_default: gmac0_mdio_default {
+ pinmux = <PIN_PA22__G0_MDC>,
+ <PIN_PA23__G0_MDIO>;
+ bias-disable;
+ };
+
+ pinctrl_gmac0_txck_default: gmac0_txck_default {
+ pinmux = <PIN_PA24__G0_TXCK>;
+ slew-rate = <0>;
+ bias-pull-up;
+ };
+
+ pinctrl_gmac0_phy_irq: gmac0_phy_irq {
+ pinmux = <PIN_PA31__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_gmac1_default: gmac1_default {
+ pinmux = <PIN_PD30__G1_TXCK>,
+ <PIN_PD22__G1_TX0>,
+ <PIN_PD23__G1_TX1>,
+ <PIN_PD21__G1_TXEN>,
+ <PIN_PD25__G1_RX0>,
+ <PIN_PD26__G1_RX1>,
+ <PIN_PD27__G1_RXER>,
+ <PIN_PD24__G1_RXDV>;
+ slew-rate = <0>;
+ bias-disable;
+ };
+
+ pinctrl_gmac1_mdio_default: gmac1_mdio_default {
+ pinmux = <PIN_PD28__G1_MDC>,
+ <PIN_PD29__G1_MDIO>;
+ bias-disable;
+ };
+
+ pinctrl_gmac1_phy_irq: gmac1_phy_irq {
+ pinmux = <PIN_PA21__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_i2c1_default: i2c1_default {
+ pinmux = <PIN_PC9__FLEXCOM1_IO0>,
+ <PIN_PC10__FLEXCOM1_IO1>;
+ bias-disable;
+ };
+
pinctrl_i2c8_default: i2c8_default {
pinmux = <PIN_PC14__FLEXCOM8_IO0>,
<PIN_PC13__FLEXCOM8_IO1>;
bias-disable;
};
+ pinctrl_i2c9_default: i2c9_default {
+ pinmux = <PIN_PC18__FLEXCOM9_IO0>,
+ <PIN_PC19__FLEXCOM9_IO1>;
+ bias-disable;
+ };
+
+ pinctrl_i2s0_default: i2s0_default {
+ pinmux = <PIN_PB23__I2SMCC0_CK>,
+ <PIN_PB24__I2SMCC0_WS>,
+ <PIN_PB25__I2SMCC0_DOUT1>,
+ <PIN_PB26__I2SMCC0_DOUT0>,
+ <PIN_PB27__I2SMCC0_MCK>;
+ bias-disable;
+ };
+
+ pinctrl_key_gpio_default: key_gpio_default {
+ pinmux = <PIN_PA12__GPIO>;
+ bias-pull-up;
+ };
+
+ pinctrl_led_gpio_default: led_gpio_default {
+ pinmux = <PIN_PA13__GPIO>,
+ <PIN_PB8__GPIO>,
+ <PIN_PD20__GPIO>;
+ bias-pull-up;
+ };
+
+ pinctrl_mikrobus1_an_default: mikrobus1_an_default {
+ pinmux = <PIN_PD0__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus2_an_default: mikrobus2_an_default {
+ pinmux = <PIN_PD1__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus1_pwm2_default: mikrobus1_pwm2_default {
+ pinmux = <PIN_PA13__PWMH2>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus2_pwm3_default: mikrobus2_pwm3_default {
+ pinmux = <PIN_PD20__PWMH3>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus1_spi_cs: mikrobus1_spi_cs {
+ pinmux = <PIN_PB6__FLEXCOM11_IO3>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus1_spi: mikrobus1_spi {
+ pinmux = <PIN_PB3__FLEXCOM11_IO0>,
+ <PIN_PB4__FLEXCOM11_IO1>,
+ <PIN_PB5__FLEXCOM11_IO2>;
+ bias-disable;
+ };
+
pinctrl_qspi: qspi {
pinmux = <PIN_PB12__QSPI0_IO0>,
<PIN_PB11__QSPI0_IO1>,
@@ -187,7 +670,7 @@
atmel,drive-strength = <ATMEL_PIO_DRVSTR_HI>;
};
- pinctrl_sdmmc0_cmd_data_default: sdmmc0_cmd_data_default {
+ pinctrl_sdmmc0_default: sdmmc0_default {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA3__SDMMC0_DAT0>,
<PIN_PA4__SDMMC0_DAT1>,
@@ -196,80 +679,126 @@
<PIN_PA7__SDMMC0_DAT4>,
<PIN_PA8__SDMMC0_DAT5>,
<PIN_PA9__SDMMC0_DAT6>,
- <PIN_PA10__SDMMC0_DAT7>;
- bias-pull-up;
- };
-
- pinctrl_sdmmc0_ck_rstn_ds_cd_default: sdmmc0_ck_rstn_ds_cd_default {
- pinmux = <PIN_PA0__SDMMC0_CK>,
+ <PIN_PA10__SDMMC0_DAT7>,
+ <PIN_PA0__SDMMC0_CK>,
<PIN_PA2__SDMMC0_RSTN>,
- <PIN_PA11__SDMMC0_DS>,
- <PIN_PA14__SDMMC0_CD>;
- bias-pull-up;
+ <PIN_PA14__SDMMC0_CD>,
+ <PIN_PA11__SDMMC0_DS>;
+ slew-rate = <0>;
+ bias-pull-up;
};
- pinctrl_sdmmc1_cmd_data_default: sdmmc1_cmd_data_default {
+ pinctrl_sdmmc1_default: sdmmc1_default {
pinmux = <PIN_PB29__SDMMC1_CMD>,
<PIN_PB31__SDMMC1_DAT0>,
<PIN_PC0__SDMMC1_DAT1>,
<PIN_PC1__SDMMC1_DAT2>,
- <PIN_PC2__SDMMC1_DAT3>;
- bias-pull-up;
- };
-
- pinctrl_sdmmc1_ck_cd_rstn_vddsel_default: sdmmc1_ck_cd_rstn_vddsel_default {
- pinmux = <PIN_PB30__SDMMC1_CK>,
+ <PIN_PC2__SDMMC1_DAT3>,
+ <PIN_PB30__SDMMC1_CK>,
<PIN_PB28__SDMMC1_RSTN>,
<PIN_PC5__SDMMC1_1V8SEL>,
<PIN_PC4__SDMMC1_CD>;
+ slew-rate = <0>;
bias-pull-up;
};
- pinctrl_gmac0_default: gmac0_default {
- pinmux = <PIN_PA16__G0_TX0>,
- <PIN_PA17__G0_TX1>,
- <PIN_PA26__G0_TX2>,
- <PIN_PA27__G0_TX3>,
- <PIN_PA19__G0_RX0>,
- <PIN_PA20__G0_RX1>,
- <PIN_PA28__G0_RX2>,
- <PIN_PA29__G0_RX3>,
- <PIN_PA15__G0_TXEN>,
- <PIN_PA30__G0_RXCK>,
- <PIN_PA18__G0_RXDV>,
- <PIN_PA25__G0_125CK>;
+ pinctrl_sdmmc2_default: sdmmc2_default {
+ pinmux = <PIN_PD3__SDMMC2_CMD>,
+ <PIN_PD5__SDMMC2_DAT0>,
+ <PIN_PD6__SDMMC2_DAT1>,
+ <PIN_PD7__SDMMC2_DAT2>,
+ <PIN_PD8__SDMMC2_DAT3>,
+ <PIN_PD4__SDMMC2_CK>;
slew-rate = <0>;
+ bias-pull-up;
+ };
+
+ pinctrl_spdifrx_default: spdifrx_default {
+ pinmux = <PIN_PB0__SPDIF_RX>;
bias-disable;
};
- pinctrl_gmac0_mdio_default: gmac0_mdio_default {
- pinmux = <PIN_PA22__G0_MDC>,
- <PIN_PA23__G0_MDIO>;
+ pinctrl_spdiftx_default: spdiftx_default {
+ pinmux = <PIN_PB1__SPDIF_TX>;
bias-disable;
};
+};
- pinctrl_gmac0_txc_default: gmac0_txc_default {
- pinmux = <PIN_PA24__G0_TXCK>;
- slew-rate = <0>;
- bias-pull-up;
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mikrobus1_pwm2_default &pinctrl_mikrobus2_pwm3_default>;
+ status = "disabled"; /* Conflict with leds. */
+};
+
+&rtt {
+ atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
+};
+
+&sdmmc0 {
+ bus-width = <8>;
+ non-removable;
+ no-1-8-v;
+ sdhci-caps-mask = <0x0 0x00200000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdmmc0_default>;
+ status = "okay";
+};
+
+&sdmmc1 {
+ bus-width = <4>;
+ no-1-8-v;
+ sdhci-caps-mask = <0x0 0x00200000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdmmc1_default>;
+ status = "okay";
+};
+
+&sdmmc2 {
+ bus-width = <4>;
+ no-1-8-v;
+ sdhci-caps-mask = <0x0 0x00200000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdmmc2_default>;
+};
+
+&shdwc {
+ atmel,shdwc-debouncer = <976>;
+ status = "okay";
+
+ input at 0 {
+ reg = <0>;
};
+};
- pinctrl_gmac1_default: gmac1_default {
- pinmux = <PIN_PD30__G1_TXCK>,
- <PIN_PD22__G1_TX0>,
- <PIN_PD23__G1_TX1>,
- <PIN_PD21__G1_TXEN>,
- <PIN_PD25__G1_RX0>,
- <PIN_PD26__G1_RX1>,
- <PIN_PD27__G1_RXER>,
- <PIN_PD24__G1_RXDV>;
- slew-rate = <0>;
- bias-disable;
+&spdifrx {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spdifrx_default>;
+ status = "okay";
+};
+
+&spdiftx {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spdiftx_default>;
+ status = "okay";
+};
+
+&tcb0 {
+ timer0: timer at 0 {
+ compatible = "atmel,tcb-timer";
+ reg = <0>;
};
- pinctrl_gmac1_mdio_default: gmac1_mdio_default {
- pinmux = <PIN_PD28__G1_MDC>,
- <PIN_PD29__G1_MDIO>;
- bias-disable;
+ timer1: timer at 1 {
+ compatible = "atmel,tcb-timer";
+ reg = <1>;
};
};
+
+&trng {
+ status = "okay";
+};
+
+&vddout25 {
+ vin-supply = <&vdd_3v3>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index 2505a2f83d..b7c261ebe9 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -1,11 +1,11 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * sama7g5.dtsi - Device Tree Include file for SAMA7G5 SoC.
+ * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
*
- * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries
+ * Copyright (C) 2020 Microchip Technology, Inc. and its subsidiaries
*
- * Author: Eugen Hristev <eugen.hristev at microchip.com>
- * Author: Claudiu Beznea <claudiu.beznea at microchip.com>
+ * Author: Eugen Hristev <eugen.hristev at microchip.com>
+ * Author: Claudiu Beznea <claudiu.beznea at microchip.com>
*
*/
@@ -14,12 +14,63 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clk/at91.h>
#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Microchip SAMA7G5 family SoC";
compatible = "microchip,sama7g5";
+ #address-cells = <1>;
+ #size-cells = <1>;
interrupt-parent = <&gic>;
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x0>;
+ clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc PMC_TYPE_CORE 22>, <&main_xtal>;
+ clock-names = "cpu", "master", "xtal";
+ };
+ };
+
+ cpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-90000000 {
+ opp-hz = /bits/ 64 <90000000>;
+ opp-microvolt = <1050000 1050000 1225000>;
+ clock-latency-ns = <320000>;
+ };
+
+ opp-250000000 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <1050000 1050000 1225000>;
+ clock-latency-ns = <320000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <1050000 1050000 1225000>;
+ clock-latency-ns = <320000>;
+ opp-suspend;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1150000 1125000 1225000>;
+ clock-latency-ns = <320000>;
+ };
+
+ opp-1000000002 {
+ opp-hz = /bits/ 64 <1000000002>;
+ opp-microvolt = <1250000 1225000 1300000>;
+ clock-latency-ns = <320000>;
+ };
+ };
+
clocks {
slow_rc_osc: slow_rc_osc {
compatible = "fixed-clock";
@@ -42,205 +93,794 @@
compatible = "fixed-clock";
#clock-cells = <0>;
};
+
+ usb_clk: usb_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
};
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
+ vddout25: fixed-regulator-vddout25 {
+ compatible = "regulator-fixed";
- A7_0: cpu at 0 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc PMC_TYPE_CORE 22>, <&main_xtal>;
- clock-names = "cpu", "master", "xtal";
- };
+ regulator-name = "VDDOUT25";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ status = "disabled";
+ };
+
+ ns_sram: sram at 100000 {
+ compatible = "mmio-sram";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x100000 0x20000>;
+ ranges;
};
- ahb {
+ soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
+ ranges;
- apb {
- compatible = "simple-bus";
+ nfc_sram: sram at 600000 {
+ compatible = "mmio-sram";
+ no-memory-wc;
+ reg = <0x00600000 0x2400>;
#address-cells = <1>;
#size-cells = <1>;
+ ranges = <0 0x00600000 0x2400>;
+ };
- pioA: pinctrl at e0014000 {
- compatible = "microchip,sama7g5-gpio";
- reg = <0xe0014000 0x800>;
- gpio-controller;
- #gpio-cells = <2>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
- status = "okay";
+ nfc_io: nfc-io at 10000000 {
+ compatible = "atmel,sama5d3-nfc-io", "syscon";
+ reg = <0x10000000 0x8000000>;
+ };
- pinctrl: pinctrl_default {
- compatible = "microchip,sama7g5-pinctrl";
- };
+ ebi: ebi at 40000000 {
+ compatible = "atmel,sama5d3-ebi";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ atmel,smc = <&hsmc>;
+ reg = <0x40000000 0x20000000>;
+ ranges = <0x0 0x0 0x40000000 0x8000000
+ 0x1 0x0 0x48000000 0x8000000
+ 0x2 0x0 0x50000000 0x8000000
+ 0x3 0x0 0x58000000 0x8000000>;
+ clocks = <&pmc PMC_TYPE_CORE 13>; /* PMC_MCK1 */
+ status = "disabled";
+
+ nand_controller: nand-controller {
+ compatible = "atmel,sama5d3-nand-controller";
+ atmel,nfc-sram = <&nfc_sram>;
+ atmel,nfc-io = <&nfc_io>;
+ ecc-engine = <&pmecc>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ status = "disabled";
};
+ };
+
+ securam: securam at e0000000 {
+ compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram";
+ reg = <0xe0000000 0x4000>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xe0000000 0x4000>;
+ no-memory-wc;
+ };
- pmc: pmc at e0018000 {
- compatible = "microchip,sama7g5-pmc";
- reg = <0xe0018000 0x200>;
- #clock-cells = <2>;
- clocks = <&clk32 1>, <&clk32 0>, <&main_xtal>, <&main_rc>;
- clock-names = "td_slck", "md_slck", "main_xtal", "main_rc";
- status = "okay";
+ secumod: secumod at e0004000 {
+ compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
+ reg = <0xe0004000 0x4000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ sfrbu: sfr at e0008000 {
+ compatible = "microchip,sama7g5-sfrbu", "atmel,sama5d2-sfrbu", "syscon";
+ reg = <0xe0008000 0x20>;
+ };
+
+ pinctrl: pinctrl at e0014000 {
+ compatible = "microchip,sama7g5-gpio";
+ reg = <0xe0014000 0x800>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
+
+ pioA: pinctrl_default {
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ compatible = "microchip,sama7g5-pinctrl";
};
+ };
+
+ pmc: pmc at e0018000 {
+ compatible = "microchip,sama7g5-pmc", "syscon";
+ reg = <0xe0018000 0x200>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #clock-cells = <2>;
+ clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>, <&main_rc>;
+ clock-names = "td_slck", "md_slck", "main_xtal", "main_rc";
+ };
+
+ shdwc: shdwc at e001d010 {
+ compatible = "microchip,sama7g5-shdwc", "syscon";
+ reg = <0xe001d010 0x10>;
+ clocks = <&clk32k 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ atmel,wakeup-rtc-timer;
+ atmel,wakeup-rtt-timer;
+ status = "disabled";
+ };
+
+ rtt: rtt at e001d020 {
+ compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
+ reg = <0xe001d020 0x30>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk32k 0>;
+ };
+
+ clk32k: clock-controller at e001d050 {
+ compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
+ reg = <0xe001d050 0x4>;
+ clocks = <&slow_rc_osc>, <&slow_xtal>;
+ #clock-cells = <1>;
+ };
+
+ gpbr: gpbr at e001d060 {
+ compatible = "microchip,sama7g5-gpbr", "syscon";
+ reg = <0xe001d060 0x48>;
+ };
+
+ rtc: rtc at e001d0a8 {
+ compatible = "microchip,sama7g5-rtc", "microchip,sam9x60-rtc";
+ reg = <0xe001d0a8 0x30>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk32k 1>;
+ };
+
+ ps_wdt: watchdog at e001d180 {
+ compatible = "microchip,sama7g5-wdt";
+ reg = <0xe001d180 0x24>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk32k 0>;
+ };
+
+ chipid at e0020000 {
+ compatible = "microchip,sama7g5-chipid";
+ reg = <0xe0020000 0x8>;
+ };
+
+ tcb1: timer at e0800000 {
+ compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xe0800000 0x100>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 91>, <&pmc PMC_TYPE_PERIPHERAL 92>, <&pmc PMC_TYPE_PERIPHERAL 93>, <&clk32k 1>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
+ };
- clk32: sckc at e001d050 {
- compatible = "microchip,sam9x60-sckc";
- reg = <0xe001d050 0x4>;
- clocks = <&slow_rc_osc>, <&slow_xtal>;
- #clock-cells = <1>;
+ hsmc: hsmc at e0808000 {
+ compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
+ reg = <0xe0808000 0x1000>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ pmecc: ecc-engine at e0808070 {
+ compatible = "atmel,sama5d2-pmecc";
+ reg = <0xe0808070 0x490>,
+ <0xe0808500 0x200>;
};
+ };
- qspi0: spi at e080c000 {
- compatible = "microchip,sama7g5-ospi";
- reg = <0xe080c000 0x400>, <0x20000000 0x10000000>;
- reg-names = "qspi_base", "qspi_mmap";
- clocks = <&pmc PMC_TYPE_PERIPHERAL 78>, <&pmc PMC_TYPE_GCK 78>;
- clock-names = "pclk", "gclk";
- assigned-clocks = <&pmc PMC_TYPE_GCK 78>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */
- #address-cells = <1>;
- #size-cells = <0>;
+ qspi0: spi at e080c000 {
+ compatible = "microchip,sama7g5-ospi";
+ reg = <0xe080c000 0x400>, <0x20000000 0x10000000>;
+ reg-names = "qspi_base", "qspi_mmap";
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(41)>,
+ <&dma0 AT91_XDMAC_DT_PERID(40)>;
+ dma-names = "tx", "rx";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 78>, <&pmc PMC_TYPE_GCK 78>;
+ clock-names = "pclk", "gclk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 78>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ qspi1: spi at e0810000 {
+ compatible = "microchip,sama7g5-qspi";
+ reg = <0xe0810000 0x400>, <0x30000000 0x10000000>;
+ reg-names = "qspi_base", "qspi_mmap";
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(43)>,
+ <&dma0 AT91_XDMAC_DT_PERID(42)>;
+ dma-names = "tx", "rx";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>;
+ clock-names = "pclk", "gclk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 78>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ can0: can at e0828000 {
+ compatible = "bosch,m_can";
+ reg = <0xe0828000 0x100>, <0x100000 0x7800>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>;
+ clock-names = "hclk", "cclk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 61>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */
+ assigned-clock-rates = <40000000>;
+ bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
+ status = "disabled";
+ };
+
+ can1: can at e082c000 {
+ compatible = "bosch,m_can";
+ reg = <0xe082c000 0x100>, <0x100000 0xbc00>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>;
+ clock-names = "hclk", "cclk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 62>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */
+ assigned-clock-rates = <40000000>;
+ bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
+ status = "disabled";
+ };
+
+ can2: can at e0830000 {
+ compatible = "bosch,m_can";
+ reg = <0xe0830000 0x100>, <0x100000 0x10000>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 63>, <&pmc PMC_TYPE_GCK 63>;
+ clock-names = "hclk", "cclk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 63>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */
+ assigned-clock-rates = <40000000>;
+ bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>;
+ status = "disabled";
+ };
+
+ can3: can at e0834000 {
+ compatible = "bosch,m_can";
+ reg = <0xe0834000 0x100>, <0x110000 0x4400>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 64>, <&pmc PMC_TYPE_GCK 64>;
+ clock-names = "hclk", "cclk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 64>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */
+ assigned-clock-rates = <40000000>;
+ bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
+ status = "disabled";
+ };
+
+ can4: can at e0838000 {
+ compatible = "bosch,m_can";
+ reg = <0xe0838000 0x100>, <0x110000 0x8800>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 65>, <&pmc PMC_TYPE_GCK 65>;
+ clock-names = "hclk", "cclk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 65>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */
+ assigned-clock-rates = <40000000>;
+ bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>;
+ status = "disabled";
+ };
+
+ can5: can at e083c000 {
+ compatible = "bosch,m_can";
+ reg = <0xe083c000 0x100>, <0x110000 0xcc00>;
+ reg-names = "m_can", "message_ram";
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 66>, <&pmc PMC_TYPE_GCK 66>;
+ clock-names = "hclk", "cclk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 66>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */
+ assigned-clock-rates = <40000000>;
+ bosch,mram-cfg = <0x8800 0 0 64 0 0 32 32>;
+ status = "disabled";
+ };
+
+ adc: adc at e1000000 {
+ compatible = "microchip,sama7g5-adc";
+ reg = <0xe1000000 0x200>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_GCK 26>;
+ assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
+ assigned-clock-rates = <100000000>;
+ clock-names = "adc_clk";
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
+ dma-names = "rx";
+ atmel,min-sample-rate-hz = <200000>;
+ atmel,max-sample-rate-hz = <20000000>;
+ atmel,startup-time-ms = <4>;
+ status = "disabled";
+ };
+
+ sdmmc0: mmc at e1204000 {
+ compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
+ reg = <0xe1204000 0x4000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>;
+ clock-names = "hclock", "multclk";
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */
+ assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
+ assigned-clock-rates = <200000000>;
+ microchip,sdcal-inverted;
+ status = "disabled";
+ };
+
+ sdmmc1: mmc at e1208000 {
+ compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
+ reg = <0xe1208000 0x4000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>;
+ clock-names = "hclock", "multclk";
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */
+ assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
+ assigned-clock-rates = <200000000>;
+ microchip,sdcal-inverted;
+ status = "disabled";
+ };
+
+ sdmmc2: mmc at e120c000 {
+ compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
+ reg = <0xe120c000 0x4000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 82>, <&pmc PMC_TYPE_GCK 82>;
+ clock-names = "hclock", "multclk";
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */
+ assigned-clocks = <&pmc PMC_TYPE_GCK 82>;
+ assigned-clock-rates = <200000000>;
+ microchip,sdcal-inverted;
+ status = "disabled";
+ };
+
+ pwm: pwm at e1604000 {
+ compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm";
+ reg = <0xe1604000 0x4000>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ #pwm-cells = <3>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 77>;
+ status = "disabled";
+ };
+
+ spdifrx: spdifrx at e1614000 {
+ #sound-dai-cells = <0>;
+ compatible = "microchip,sama7g5-spdifrx";
+ reg = <0xe1614000 0x4000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(49)>;
+ dma-names = "rx";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 84>, <&pmc PMC_TYPE_GCK 84>;
+ clock-names = "pclk", "gclk";
+ status = "disabled";
+ };
+
+ spdiftx: spdiftx at e1618000 {
+ #sound-dai-cells = <0>;
+ compatible = "microchip,sama7g5-spdiftx";
+ reg = <0xe1618000 0x4000>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(50)>;
+ dma-names = "tx";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 85>, <&pmc PMC_TYPE_GCK 85>;
+ clock-names = "pclk", "gclk";
+ };
+
+ i2s0: i2s at e161c000 {
+ compatible = "microchip,sama7g5-i2smcc";
+ #sound-dai-cells = <0>;
+ reg = <0xe161c000 0x4000>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(34)>, <&dma0 AT91_XDMAC_DT_PERID(33)>;
+ dma-names = "tx", "rx";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
+ clock-names = "pclk", "gclk";
+ status = "disabled";
+ };
+
+ i2s1: i2s at e1620000 {
+ compatible = "microchip,sama7g5-i2smcc";
+ #sound-dai-cells = <0>;
+ reg = <0xe1620000 0x4000>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(36)>, <&dma0 AT91_XDMAC_DT_PERID(35)>;
+ dma-names = "tx", "rx";
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>;
+ clock-names = "pclk", "gclk";
+ status = "disabled";
+ };
+
+ eic: interrupt-controller at e1628000 {
+ compatible = "microchip,sama7g5-eic";
+ reg = <0xe1628000 0xec>;
+ interrupt-parent = <&gic>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
+ clock-names = "pclk";
+ status = "disabled";
+ };
+
+ pit64b0: timer at e1800000 {
+ compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
+ reg = <0xe1800000 0x4000>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>;
+ clock-names = "pclk", "gclk";
+ };
+
+ pit64b1: timer at e1804000 {
+ compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
+ reg = <0xe1804000 0x4000>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 71>, <&pmc PMC_TYPE_GCK 71>;
+ clock-names = "pclk", "gclk";
+ };
+
+ aes: crypto at e1810000 {
+ compatible = "atmel,at91sam9g46-aes";
+ reg = <0xe1810000 0x100>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
+ clock-names = "aes_clk";
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>,
+ <&dma0 AT91_XDMAC_DT_PERID(2)>;
+ dma-names = "tx", "rx";
+ };
+
+ sha: crypto at e1814000 {
+ compatible = "atmel,at91sam9g46-sha";
+ reg = <0xe1814000 0x100>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 83>;
+ clock-names = "sha_clk";
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>;
+ dma-names = "tx";
+ };
+
+ flx0: flexcom at e1818000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xe1818000 0x200>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe1818000 0x800>;
+ status = "disabled";
+
+ uart0: serial at 200 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
+ clock-names = "usart";
+ dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>,
+ <&dma1 AT91_XDMAC_DT_PERID(5)>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
status = "disabled";
};
+ };
- qspi1: spi at e0810000 {
- compatible = "microchip,sama7g5-qspi";
- reg = <0xe0810000 0x400>, <0x30000000 0x10000000>;
- reg-names = "qspi_base", "qspi_mmap";
- clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>;
- clock-names = "pclk", "gclk";
- assigned-clocks = <&pmc PMC_TYPE_GCK 78>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */
+ flx1: flexcom at e181c000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xe181c000 0x200>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe181c000 0x800>;
+ status = "disabled";
+
+ i2c1: i2c at 600 {
+ compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
+ atmel,fifo-size = <32>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
+ <&dma0 AT91_XDMAC_DT_PERID(8)>;
+ dma-names = "rx", "tx";
status = "disabled";
};
+ };
- sdmmc0: sdio-host at e1204000 {
- compatible = "microchip,sama7g5-sdhci";
- reg = <0xe1204000 0x300>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>;
- clock-names = "hclock", "multclk";
- assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
- assigned-clock-rates = <200000000>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */
- status = "disabled";
- };
+ flx3: flexcom at e1824000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xe1824000 0x200>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe1824000 0x800>;
+ status = "disabled";
- sdmmc1: sdio-host at e1208000 {
- compatible = "microchip,sama7g5-sdhci";
- reg = <0xe1208000 0x300>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>;
- clock-names = "hclock", "multclk";
- assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
- assigned-clock-rates = <200000000>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */
+ uart3: serial at 200 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
+ clock-names = "usart";
+ dmas = <&dma1 AT91_XDMAC_DT_PERID(12)>,
+ <&dma1 AT91_XDMAC_DT_PERID(11)>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
status = "disabled";
};
+ };
- pit64b0: timer at e1800000 {
- compatible = "microchip,sama7g5-pit64b";
- reg = <0xe1800000 0x4000>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>;
- clock-names = "pclk", "gclk";
- status = "okay";
- };
+ trng: rng at e2010000 {
+ compatible = "microchip,sama7g5-trng", "atmel,at91sam9g45-trng";
+ reg = <0xe2010000 0x100>;
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 97>;
+ status = "disabled";
+ };
- flx1: flexcom at e181c000 {
- compatible = "atmel,sama5d2-flexcom";
- reg = <0xe181c000 0x200>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0xe181c000 0x800>;
- status = "disabled";
+ tdes: crypto at e2014000 {
+ compatible = "atmel,at91sam9g46-tdes";
+ reg = <0xe2014000 0x100>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 96>;
+ clock-names = "tdes_clk";
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>,
+ <&dma0 AT91_XDMAC_DT_PERID(53)>;
+ dma-names = "tx", "rx";
+ };
- i2c1: i2c at 600 {
- compatible = "atmel,sama5d2-i2c";
- reg = <0x600 0x200>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
- };
- };
+ flx4: flexcom at e2018000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xe2018000 0x200>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe2018000 0x800>;
+ status = "disabled";
- uart0: serial at e1824200 {
+ uart4: serial at 200 {
compatible = "atmel,at91sam9260-usart";
- reg = <0xe1824200 0x200>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
+ reg = <0x200 0x200>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
clock-names = "usart";
+ dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>,
+ <&dma1 AT91_XDMAC_DT_PERID(13)>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
status = "disabled";
};
+ };
- gmac0: ethernet at e2800000 {
- compatible = "cdns,sama7g5-gem";
- reg = <0xe2800000 0x4000>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>;
- clock-names = "hclk", "pclk", "tx_clk";
- assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
- assigned-clock-parents = <&pmc PMC_TYPE_CORE 21>; /* eth pll div. */
- assigned-clock-rates = <125000000>;
+ flx7: flexcom at e2024000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xe2024000 0x200>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe2024000 0x800>;
+ status = "disabled";
+
+ uart7: serial at 200 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
+ clock-names = "usart";
+ dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
+ <&dma1 AT91_XDMAC_DT_PERID(19)>;
+ dma-names = "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size = <16>;
status = "disabled";
};
+ };
+
+ gmac0: ethernet at e2800000 {
+ compatible = "cdns,sama7g5-gem";
+ reg = <0xe2800000 0x1000>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>, <&pmc PMC_TYPE_GCK 53>;
+ clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
+ assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
+ assigned-clock-parents = <&pmc PMC_TYPE_CORE 21>; /* eth pll div. */
+ assigned-clock-rates = <125000000>;
+ status = "disabled";
+ };
+
+ gmac1: ethernet at e2804000 {
+ compatible = "cdns,sama7g5-emac";
+ reg = <0xe2804000 0x1000>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>;
+ clock-names = "pclk", "hclk";
+ status = "disabled";
+ };
+
+ dma0: dma-controller at e2808000 {
+ compatible = "microchip,sama7g5-dma";
+ reg = <0xe2808000 0x1000>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
+ clock-names = "dma_clk";
+ status = "disabled";
+ };
+
+ dma1: dma-controller at e280c000 {
+ compatible = "microchip,sama7g5-dma";
+ reg = <0xe280c000 0x1000>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
+ clock-names = "dma_clk";
+ status = "disabled";
+ };
+
+ /* Place dma2 here despite it's address */
+ dma2: dma-controller at e1200000 {
+ compatible = "microchip,sama7g5-dma";
+ reg = <0xe1200000 0x1000>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
+ clock-names = "dma_clk";
+ dma-requests = <0>;
+ status = "disabled";
+ };
+
+ tcb0: timer at e2814000 {
+ compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xe2814000 0x100>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 88>, <&pmc PMC_TYPE_PERIPHERAL 89>, <&pmc PMC_TYPE_PERIPHERAL 90>, <&clk32k 1>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
+ };
+
+ flx8: flexcom at e2818000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xe2818000 0x200>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe2818000 0x800>;
+ status = "disabled";
- gmac1: ethernet at e2804000 {
- compatible = "cdns,sama7g5-emac";
- reg = <0xe2804000 0x1000>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>;
- clock-names = "pclk", "hclk";
+ i2c8: i2c at 600 {
+ compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
+ atmel,fifo-size = <32>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>,
+ <&dma0 AT91_XDMAC_DT_PERID(22)>;
+ dma-names = "rx", "tx";
status = "disabled";
};
+ };
- dma0: dma-controller at e2808000 {
- compatible = "microchip,sama7g5-dma";
- reg = <0xe2808000 0x1000>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
- clock-names = "dma_clk";
+ flx9: flexcom at e281c000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xe281c000 0x200>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe281c000 0x800>;
+ status = "disabled";
+
+ i2c9: i2c at 600 {
+ compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
+ atmel,fifo-size = <32>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(23)>,
+ <&dma0 AT91_XDMAC_DT_PERID(24)>;
+ dma-names = "rx", "tx";
status = "disabled";
};
+ };
- flx8: flexcom at e2818000 {
- compatible = "atmel,sama5d2-flexcom";
- reg = <0xe2818000 0x200>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
+ flx11: flexcom at e2824000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xe2824000 0x200>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe2824000 0x800>;
+ status = "disabled";
+
+ spi11: spi at 400 {
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0x400 0x200>;
+ interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
+ clock-names = "spi_clk";
#address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0xe2818000 0x800>;
+ #size-cells = <0>;
+ atmel,fifo-size = <32>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>,
+ <&dma0 AT91_XDMAC_DT_PERID(28)>;
+ dma-names = "rx", "tx";
status = "disabled";
-
- i2c8: i2c at 600 {
- compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
- reg = <0x600 0x200>;
- interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
- atmel,fifo-size = <32>;
- dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>,
- <&dma0 AT91_XDMAC_DT_PERID(22)>;
- dma-names = "rx", "tx";
- atmel,use-dma-rx;
- atmel,use-dma-tx;
- status = "disabled";
- };
};
+ };
- gic: interrupt-controller at e8c11000 {
- compatible = "arm,cortex-a7-gic";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- interrupt-parent;
- reg = <0xe8c11000 0x1000>,
- <0xe8c12000 0x2000>;
- };
+ uddrc: uddrc at e3800000 {
+ compatible = "microchip,sama7g5-uddrc";
+ reg = <0xe3800000 0x4000>;
+ };
+
+ ddr3phy: ddr3phy at e3804000 {
+ compatible = "microchip,sama7g5-ddr3phy";
+ reg = <0xe3804000 0x1000>;
+ };
+
+ gic: interrupt-controller at e8c11000 {
+ compatible = "arm,cortex-a7-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ interrupt-parent;
+ reg = <0xe8c11000 0x1000>,
+ <0xe8c12000 0x2000>;
};
};
};
--
2.25.1
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