[PATCH] arm: dts: imx8m*-venice: add gpio hog support
Tim Harvey
tharvey at gateworks.com
Tue Mar 8 19:43:32 CET 2022
Add gpio hog support for board-specific gpio lines:
- put hogs in u-boot.dtsi so as to keep the regular dts files
in sync with the kernel. The hogs will not be put in the kernel
as that makes them un-usable by userspace as well as
re-initializes them to dt defaults overriding changes which may
have been done by bootloader commands.
- specify gpio names and initial config
- enable GPIO_HOG
Signed-off-by: Tim Harvey <tharvey at gateworks.com>
---
.../dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi | 46 ++++++
.../dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi | 81 ++++++++++
.../dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi | 81 ++++++++++
arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi | 118 ++++++++++++++
arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi | 150 ++++++++++++++++++
arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi | 83 ++++++++++
arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi | 108 +++++++++++++
configs/imx8mm_venice_defconfig | 1 +
configs/imx8mn_venice_defconfig | 1 +
9 files changed, 669 insertions(+)
diff --git a/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi
index f5d52c2fe259..b3592331c72b 100644
--- a/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi
@@ -3,3 +3,49 @@
* Copyright 2021 Gateworks Corporation
*/
#include "imx8mm-venice-gw700x-u-boot.dtsi"
+
+&gpio1 {
+ pci_usb_sel {
+ gpio-hog;
+ output-low;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ line-name = "pci_usb_sel";
+ };
+
+ dio_0 {
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "dio0";
+ };
+
+ dio_1 {
+ gpio-hog;
+ input;
+ gpios = <9 GPIO_ACTIVE_HIGH>;
+ line-name = "dio1";
+ };
+};
+
+&gpio4 {
+ dio_2 {
+ gpio-hog;
+ input;
+ gpios = <3 GPIO_ACTIVE_HIGH>;
+ line-name = "dio2";
+ };
+
+ dio_3 {
+ gpio-hog;
+ input;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ line-name = "dio3";
+ };
+
+ pci_wdis {
+ gpio-hog;
+ output-high;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "pci_wdis#";
+ };
+};
diff --git a/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi
index f5d52c2fe259..92e44d4ba96b 100644
--- a/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi
@@ -3,3 +3,84 @@
* Copyright 2021 Gateworks Corporation
*/
#include "imx8mm-venice-gw700x-u-boot.dtsi"
+
+&gpio1 {
+ rs485_term {
+ gpio-hog;
+ output-low;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ line-name = "rs485_term";
+ };
+
+ mipi_gpio4 {
+ gpio-hog;
+ input;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio4";
+ };
+
+ pci_usb_sel {
+ gpio-hog;
+ output-low;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ line-name = "pci_usb_sel";
+ };
+
+ dio_0 {
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "dio0";
+ };
+
+ dio_1 {
+ gpio-hog;
+ input;
+ gpios = <9 GPIO_ACTIVE_HIGH>;
+ line-name = "dio1";
+ };
+};
+
+&gpio4 {
+ rs485_en {
+ gpio-hog;
+ output-low;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ line-name = "rs485_en";
+ };
+
+ mipi_gpio3 {
+ gpio-hog;
+ input;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio3";
+ };
+
+ rs485_half {
+ gpio-hog;
+ output-low;
+ gpios = <2 GPIO_ACTIVE_HIGH>;
+ line-name = "rs485_hd";
+ };
+
+ mipi_gpio2 {
+ gpio-hog;
+ input;
+ gpios = <3 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio2";
+ };
+
+ mipi_gpio1 {
+ gpio-hog;
+ input;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio1";
+ };
+
+ pci_wdis {
+ gpio-hog;
+ output-high;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "pci_wdis#";
+ };
+};
diff --git a/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi
index f5d52c2fe259..92e44d4ba96b 100644
--- a/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi
@@ -3,3 +3,84 @@
* Copyright 2021 Gateworks Corporation
*/
#include "imx8mm-venice-gw700x-u-boot.dtsi"
+
+&gpio1 {
+ rs485_term {
+ gpio-hog;
+ output-low;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ line-name = "rs485_term";
+ };
+
+ mipi_gpio4 {
+ gpio-hog;
+ input;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio4";
+ };
+
+ pci_usb_sel {
+ gpio-hog;
+ output-low;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ line-name = "pci_usb_sel";
+ };
+
+ dio_0 {
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "dio0";
+ };
+
+ dio_1 {
+ gpio-hog;
+ input;
+ gpios = <9 GPIO_ACTIVE_HIGH>;
+ line-name = "dio1";
+ };
+};
+
+&gpio4 {
+ rs485_en {
+ gpio-hog;
+ output-low;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ line-name = "rs485_en";
+ };
+
+ mipi_gpio3 {
+ gpio-hog;
+ input;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio3";
+ };
+
+ rs485_half {
+ gpio-hog;
+ output-low;
+ gpios = <2 GPIO_ACTIVE_HIGH>;
+ line-name = "rs485_hd";
+ };
+
+ mipi_gpio2 {
+ gpio-hog;
+ input;
+ gpios = <3 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio2";
+ };
+
+ mipi_gpio1 {
+ gpio-hog;
+ input;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio1";
+ };
+
+ pci_wdis {
+ gpio-hog;
+ output-high;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "pci_wdis#";
+ };
+};
diff --git a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi
index a801ee1deb93..11c773bb70d6 100644
--- a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi
@@ -5,6 +5,124 @@
#include "imx8mm-venice-u-boot.dtsi"
+&gpio1 {
+ uart1_rs422 {
+ gpio-hog;
+ output-high;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_rs422#";
+ };
+
+ uart1rs485 {
+ gpio-hog;
+ output-high;
+ gpios = <3 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_rs485#";
+ };
+
+ uart1rs232 {
+ gpio-hog;
+ output-high;
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_rs232#";
+ };
+
+ dig1in {
+ gpio-hog;
+ input;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ line-name = "dig1_in";
+ };
+
+ dig1out {
+ gpio-hog;
+ output-low;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "dig1_out";
+ };
+};
+
+&gpio4 {
+ uart3_rs232 {
+ gpio-hog;
+ output-high;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ line-name = "uart3_rs232#";
+ };
+
+ uart3_rs422 {
+ gpio-hog;
+ output-high;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "uart3_rs422#";
+ };
+
+ uart3_rs485 {
+ gpio-hog;
+ output-high;
+ gpios = <8 GPIO_ACTIVE_HIGH>;
+ line-name = "uart3_rs485#";
+ };
+
+ uart4_rs485 {
+ gpio-hog;
+ output-high;
+ gpios = <27 GPIO_ACTIVE_HIGH>;
+ line-name = "uart4_rs485#";
+ };
+
+ sim1det {
+ gpio-hog;
+ input;
+ gpios = <29 GPIO_ACTIVE_HIGH>;
+ line-name = "sim1_det";
+ };
+
+ sim2det {
+ gpio-hog;
+ input;
+ gpios = <30 GPIO_ACTIVE_HIGH>;
+ line-name = "sim2_det";
+ };
+};
+
+&gpio5 {
+ dig2out {
+ gpio-hog;
+ output-low;
+ gpios = <3 GPIO_ACTIVE_HIGH>;
+ line-name = "dig2_out";
+ };
+
+ dig2in {
+ gpio-hog;
+ input;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ line-name = "dig2_in";
+ };
+
+ sim2sel {
+ gpio-hog;
+ output-low;
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ line-name = "sim2_sel";
+ };
+
+ uart4_rs232 {
+ gpio-hog;
+ output-high;
+ gpios = <10 GPIO_ACTIVE_HIGH>;
+ line-name = "uart4_rs232#";
+ };
+
+ uart4_rs422 {
+ gpio-hog;
+ output-high;
+ gpios = <13 GPIO_ACTIVE_HIGH>;
+ line-name = "uart4_rs422#";
+ };
+};
+
&fec1 {
phy-reset-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
diff --git a/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi
index d0e5d6c5b634..1e1769f55127 100644
--- a/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi
@@ -5,6 +5,156 @@
#include "imx8mm-venice-u-boot.dtsi"
+&gpio1 {
+ m2rst {
+ gpio-hog;
+ output-low;
+ gpios = <13 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_reset";
+ };
+
+ m2wdis {
+ gpio-hog;
+ output-high;
+ gpios = <15 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_wdis#";
+ };
+};
+
+&gpio2 {
+ uart2en {
+ gpio-hog;
+ output-high;
+ gpios = <8 GPIO_ACTIVE_HIGH>;
+ line-name = "uart2_en#";
+ };
+};
+
+&gpio3 {
+ m2gdis {
+ gpio-hog;
+ output-high;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_gdis#";
+ };
+
+ m2off {
+ gpio-hog;
+ output-high;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_off#";
+ };
+};
+
+&gpio4 {
+ ampgpio3 {
+ gpio-hog;
+ input;
+ gpios = <11 GPIO_ACTIVE_HIGH>;
+ line-name = "amp_gpio3";
+ };
+
+ ampgpio2 {
+ gpio-hog;
+ input;
+ gpios = <12 GPIO_ACTIVE_HIGH>;
+ line-name = "amp_gpio2";
+ };
+
+ ampgpio1 {
+ gpio-hog;
+ input;
+ gpios = <14 GPIO_ACTIVE_HIGH>;
+ line-name = "amp_gpio1";
+ };
+
+ ltrpwr {
+ gpio-hog;
+ output-low;
+ gpios = <16 GPIO_ACTIVE_HIGH>;
+ line-name = "lte_pwr#";
+ };
+
+ lterst {
+ gpio-hog;
+ output-low;
+ gpios = <17 GPIO_ACTIVE_HIGH>;
+ line-name = "lte_rst";
+ };
+
+ ampgpio4 {
+ gpio-hog;
+ input;
+ gpios = <20 GPIO_ACTIVE_HIGH>;
+ line-name = "amp_gpio4";
+ };
+
+ appgpio1 {
+ gpio-hog;
+ input;
+ gpios = <21 GPIO_ACTIVE_HIGH>;
+ line-name = "app_gpio1";
+ };
+
+ uart1rs485 {
+ gpio-hog;
+ output-low;
+ gpios = <23 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_rs485";
+ };
+
+ uart1term {
+ gpio-hog;
+ output-low;
+ gpios = <25 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_term";
+ };
+
+ uart1half {
+ gpio-hog;
+ output-low;
+ gpios = <26 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_half";
+ };
+
+ appgpio2 {
+ gpio-hog;
+ input;
+ gpios = <27 GPIO_ACTIVE_HIGH>;
+ line-name = "app_gpio2";
+ };
+
+ mipigpio1 {
+ gpio-hog;
+ input;
+ gpios = <28 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio1";
+ };
+};
+
+&gpio5 {
+ mipigpio4 {
+ gpio-hog;
+ input;
+ gpios = <3 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio4";
+ };
+
+ mipigpio3 {
+ gpio-hog;
+ input;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio3";
+ };
+
+ mipigpio2 {
+ gpio-hog;
+ input;
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio2";
+ };
+};
+
&fec1 {
phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
diff --git a/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi
index 36a605468b22..896e5d4edde3 100644
--- a/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi
@@ -5,6 +5,89 @@
#include "imx8mm-venice-u-boot.dtsi"
+&gpio1 {
+ rs422en {
+ gpio-hog;
+ output-high;
+ gpios = <10 GPIO_ACTIVE_HIGH>;
+ line-name = "rs422_en#";
+ };
+
+ rs485en {
+ gpio-hog;
+ output-high;
+ gpios = <11 GPIO_ACTIVE_HIGH>;
+ line-name = "rs485_en#";
+ };
+
+ rs232en {
+ gpio-hog;
+ output-low;
+ gpios = <12 GPIO_ACTIVE_HIGH>;
+ line-name = "rs232_en#";
+ };
+};
+
+&gpio2 {
+ dig2in {
+ gpio-hog;
+ input;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ line-name = "dig2_in";
+ };
+
+ dig2out {
+ gpio-hog;
+ output-high;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ line-name = "dig2_out#";
+ };
+
+ dig1out {
+ gpio-hog;
+ output-high;
+ gpios = <8 GPIO_ACTIVE_HIGH>;
+ line-name = "dig1_out#";
+ };
+
+ dig1in {
+ gpio-hog;
+ input;
+ gpios = <9 GPIO_ACTIVE_HIGH>;
+ line-name = "dig1_in";
+ };
+};
+
+&gpio5 {
+ sim1det {
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_LOW>;
+ line-name = "sim1_det#";
+ };
+
+ sim2det {
+ gpio-hog;
+ input;
+ gpios = <8 GPIO_ACTIVE_LOW>;
+ line-name = "sim2_det#";
+ };
+
+ sim2sel {
+ gpio-hog;
+ output-low;
+ gpios = <9 GPIO_ACTIVE_HIGH>;
+ line-name = "sim2_sel";
+ };
+
+ pci_wdis {
+ gpio-hog;
+ output-high;
+ gpios = <12 GPIO_ACTIVE_HIGH>;
+ line-name = "pci_wdis#";
+ };
+};
+
&fec1 {
phy-reset-gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
diff --git a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi
index b334b56b82a1..9431e2a6cde7 100644
--- a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi
@@ -5,6 +5,114 @@
#include "imx8mn-venice-u-boot.dtsi"
+&gpio1 {
+ m2rst {
+ gpio-hog;
+ output-low;
+ gpios = <13 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_reset";
+ };
+
+ m2wdis {
+ gpio-hog;
+ output-high;
+ gpios = <15 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_wdis#";
+ };
+};
+
+&gpio2 {
+ uart2en {
+ gpio-hog;
+ output-high;
+ gpios = <8 GPIO_ACTIVE_HIGH>;
+ line-name = "uart2_en#";
+ };
+};
+
+&gpio3 {
+ m2gdis {
+ gpio-hog;
+ output-high;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_gdis#";
+ };
+
+ m2off {
+ gpio-hog;
+ output-high;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "m2_off#";
+ };
+};
+
+&gpio4 {
+ appgpio1 {
+ gpio-hog;
+ input;
+ gpios = <21 GPIO_ACTIVE_HIGH>;
+ line-name = "app_gpio1";
+ };
+
+ uart1rs485 {
+ gpio-hog;
+ output-low;
+ gpios = <23 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_rs485";
+ };
+
+ uart1term {
+ gpio-hog;
+ output-low;
+ gpios = <25 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_term";
+ };
+
+ uart1half {
+ gpio-hog;
+ output-low;
+ gpios = <26 GPIO_ACTIVE_HIGH>;
+ line-name = "uart1_half";
+ };
+
+ appgpio2 {
+ gpio-hog;
+ input;
+ gpios = <27 GPIO_ACTIVE_HIGH>;
+ line-name = "app_gpio2";
+ };
+
+ mipigpio1 {
+ gpio-hog;
+ input;
+ gpios = <28 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio1";
+ };
+};
+
+&gpio5 {
+ mipigpio4 {
+ gpio-hog;
+ input;
+ gpios = <3 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio4";
+ };
+
+ mipigpio3 {
+ gpio-hog;
+ input;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio3";
+ };
+
+ mipigpio2 {
+ gpio-hog;
+ input;
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ line-name = "mipi_gpio2";
+ };
+};
+
&fec1 {
phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index 78dc7acb3e60..03caef612790 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -74,6 +74,7 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_IMX8MM=y
CONFIG_CLK_IMX8MM=y
+CONFIG_GPIO_HOG=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
CONFIG_LED=y
diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig
index dbfda3706dbc..d0723c440708 100644
--- a/configs/imx8mn_venice_defconfig
+++ b/configs/imx8mn_venice_defconfig
@@ -76,6 +76,7 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_IMX8MN=y
CONFIG_CLK_IMX8MN=y
+CONFIG_GPIO_HOG=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
CONFIG_LED=y
--
2.17.1
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