[PATCH v2 19/28] arm64: Save esr in pt_regs
Sean Anderson
sean.anderson at seco.com
Thu Mar 10 21:50:49 CET 2022
To avoid passing around an extra register everywhere, save esr in
pt_regs like the rest. For proper alignment we need to have a second
(unused) register. All the printfs have to be adjusted, since
it's now an unsigned long and not an int.
Signed-off-by: Sean Anderson <sean.anderson at seco.com>
---
Changes in v2:
- New
arch/arm/cpu/armv8/exceptions.S | 6 +++--
arch/arm/include/asm/proc-armv/ptrace.h | 2 ++
arch/arm/include/asm/u-boot-arm.h | 7 +-----
arch/arm/lib/interrupts_64.c | 33 +++++++++++++------------
arch/arm/mach-imx/imx8m/soc.c | 4 +--
5 files changed, 26 insertions(+), 26 deletions(-)
diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index a15af72e02..001913f429 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -84,7 +84,8 @@ _save_el_regs:
1: mrs x1, esr_el1
mrs x2, elr_el1
0:
- stp x2, x0, [sp, #-16]!
+ stp x1, x0, [sp, #-16]!
+ stp xzr, x2, [sp, #-16]!
mov x0, sp
ret
@@ -98,7 +99,7 @@ _save_el_regs:
* This is the first part of the shared routine called into from all entries.
*/
exception_exit:
- ldp x2, x0, [sp],#16
+ ldp xzr, x2, [sp],#16
switch_el x11, 3f, 2f, 1f
3: msr elr_el3, x2
b _restore_regs
@@ -118,6 +119,7 @@ exception_exit:
* This is the second part of the shared routine called into from all entries.
*/
_restore_regs:
+ ldp xzr, x0, [sp],#16
ldp x1, x2, [sp],#16
ldp x3, x4, [sp],#16
ldp x5, x6, [sp],#16
diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h
index e37ad8fd1f..bebcaf6e33 100644
--- a/arch/arm/include/asm/proc-armv/ptrace.h
+++ b/arch/arm/include/asm/proc-armv/ptrace.h
@@ -21,7 +21,9 @@
* on the stack during an exception.
*/
struct pt_regs {
+ unsigned long unused;
unsigned long elr;
+ unsigned long esr;
unsigned long regs[31];
};
diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h
index 0b93cc48c5..aef048708d 100644
--- a/arch/arm/include/asm/u-boot-arm.h
+++ b/arch/arm/include/asm/u-boot-arm.h
@@ -46,13 +46,8 @@ void do_software_interrupt(struct pt_regs *pt_regs);
void do_prefetch_abort(struct pt_regs *pt_regs);
void do_data_abort(struct pt_regs *pt_regs);
void do_not_used(struct pt_regs *pt_regs);
-#ifdef CONFIG_ARM64
-void do_fiq(struct pt_regs *pt_regs, unsigned int esr);
-void do_irq(struct pt_regs *pt_regs, unsigned int esr);
-#else
void do_fiq(struct pt_regs *pt_regs);
-void do_irq(struct pt_regs *pt_regswq);
-#endif
+void do_irq(struct pt_regs *pt_regs);
void reset_misc(void);
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index c653e67db2..049beeca7e 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -66,10 +66,11 @@ void show_regs(struct pt_regs *regs)
/*
* do_bad_sync handles the impossible case in the Synchronous Abort vector.
*/
-void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr)
+void do_bad_sync(struct pt_regs *pt_regs)
{
efi_restore_gd();
- printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08x\n", esr);
+ printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08lx\n",
+ pt_regs->esr);
show_regs(pt_regs);
show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n");
@@ -78,10 +79,10 @@ void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr)
/*
* do_bad_irq handles the impossible case in the Irq vector.
*/
-void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr)
+void do_bad_irq(struct pt_regs *pt_regs)
{
efi_restore_gd();
- printf("Bad mode in \"Irq\" handler, esr 0x%08x\n", esr);
+ printf("Bad mode in \"Irq\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs);
show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n");
@@ -90,10 +91,10 @@ void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr)
/*
* do_bad_fiq handles the impossible case in the Fiq vector.
*/
-void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr)
+void do_bad_fiq(struct pt_regs *pt_regs)
{
efi_restore_gd();
- printf("Bad mode in \"Fiq\" handler, esr 0x%08x\n", esr);
+ printf("Bad mode in \"Fiq\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs);
show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n");
@@ -102,10 +103,10 @@ void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr)
/*
* do_bad_error handles the impossible case in the Error vector.
*/
-void do_bad_error(struct pt_regs *pt_regs, unsigned int esr)
+void do_bad_error(struct pt_regs *pt_regs)
{
efi_restore_gd();
- printf("Bad mode in \"Error\" handler, esr 0x%08x\n", esr);
+ printf("Bad mode in \"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs);
show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n");
@@ -114,10 +115,10 @@ void do_bad_error(struct pt_regs *pt_regs, unsigned int esr)
/*
* do_sync handles the Synchronous Abort exception.
*/
-void do_sync(struct pt_regs *pt_regs, unsigned int esr)
+void do_sync(struct pt_regs *pt_regs)
{
efi_restore_gd();
- printf("\"Synchronous Abort\" handler, esr 0x%08x\n", esr);
+ printf("\"Synchronous Abort\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs);
show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n");
@@ -126,10 +127,10 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr)
/*
* do_irq handles the Irq exception.
*/
-void do_irq(struct pt_regs *pt_regs, unsigned int esr)
+void do_irq(struct pt_regs *pt_regs)
{
efi_restore_gd();
- printf("\"Irq\" handler, esr 0x%08x\n", esr);
+ printf("\"Irq\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs);
show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n");
@@ -138,10 +139,10 @@ void do_irq(struct pt_regs *pt_regs, unsigned int esr)
/*
* do_fiq handles the Fiq exception.
*/
-void do_fiq(struct pt_regs *pt_regs, unsigned int esr)
+void do_fiq(struct pt_regs *pt_regs)
{
efi_restore_gd();
- printf("\"Fiq\" handler, esr 0x%08x\n", esr);
+ printf("\"Fiq\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs);
show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n");
@@ -153,10 +154,10 @@ void do_fiq(struct pt_regs *pt_regs, unsigned int esr)
* it is defined with weak attribute and can be redefined
* in processor specific code.
*/
-void __weak do_error(struct pt_regs *pt_regs, unsigned int esr)
+void __weak do_error(struct pt_regs *pt_regs)
{
efi_restore_gd();
- printf("\"Error\" handler, esr 0x%08x\n", esr);
+ printf("\"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs);
show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n");
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 1a5a391443..06d9f7128d 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -1293,7 +1293,7 @@ void imx_tmu_arch_init(void *reg_base)
#if defined(CONFIG_IMX8MQ) || defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN)
bool serror_need_skip = true;
-void do_error(struct pt_regs *pt_regs, unsigned int esr)
+void do_error(struct pt_regs *pt_regs)
{
/*
* If stack is still in ROM reserved OCRAM not switch to SPL,
@@ -1318,7 +1318,7 @@ void do_error(struct pt_regs *pt_regs, unsigned int esr)
}
efi_restore_gd();
- printf("\"Error\" handler, esr 0x%08x\n", esr);
+ printf("\"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs);
panic("Resetting CPU ...\n");
}
--
2.25.1
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