[PATCH] clk: imx8mq: Add a clock driver for the imx8mq

[Marek Vasut]

On 3/11/22 14:50, Angus Ainslie wrote:
> On 2022-03-11 02:18, Marek Vasut wrote:
>> On 3/11/22 01:53, Angus Ainslie wrote:
>>> Based off the imx8mm u-boot driver and the linux kernel driver
>>
>> What does this patch do again ? (it is impossible to tell from the
>> one-line commit message above unless you have it back-to-back with
>> Subject).
>>
>> Also, if these tables come from Linux, please include the upstream
>> linux kernel commit ID from which these tables come from, so next time
>> the tables need to be synchronized from Linux to U-Boot, we could only
>> pick the new commits from Linux since the base commit.
>>
> 
> Ok I'll update the description.

Thank you

>> [...]
>>
>>> +static const char *imx8mq_a53_core_sels[] = {"arm_a53_div", 
>>> "arm_pll_out", };
>>> +static const char *imx8mq_a53_sels[] = {"clock-osc-25m", 
>>> "arm_pll_out", "sys_pll2_500m",
>>> +                    "sys_pll2_1000m", "sys_pll1_800m", "sys_pll1_400m",
>>> +                    "audio_pll1_out", "sys_pll3_out", };
>>> +
>>> +static const char *imx8mq_ahb_sels[] = {"clock-osc-25m", 
>>> "sys_pll1_133m", "sys_pll1_800m",
>>> +                    "sys_pll1_400m", "sys_pll2_125m", "sys_pll3_out",
>>> +                    "audio_pll1_out", "video_pll1_out", };
>>> +
>>> +static const char *imx8mq_enet_axi_sels[] = {"clock-osc-25m", 
>>> "sys_pll1_266m", "sys_pll1_800m",
>>> +                         "sys_pll2_250m", "sys_pll2_200m", 
>>> "audio_pll1_out",
>>> +                         "video_pll1_out", "sys_pll3_out", };
>>> +
>>> +#ifndef CONFIG_SPL_BUILD
>>
>> You might want to invert the logic -- ifdef CONFIG_SPL_BUILD -- and
>> then NOT include a lot of these clock in SPL to reduce the size of the
>> SPL.
>>
> 
> I don't use it in the SPL so just mirrored what was in the imx8mm driver.
> 
> I think I prefer to just drop them and then if there is an SPL user they 
> can figure out where to disable SPL clocks based on the subsystems 
> enabled rather than the SPL_BUILD flag.

That works too, I suspect that SPL user would be you eventually anyway, 
since you will need clock driver to operate e.g. eMMC in HS modes.

>> [...]
>>
>> The rest looks good to me, thanks.
> 
> Thanks can I add a Reviewed-by ?

Once I review the updated description, I will add it.