[PATCH v3 4/4] rockchip: rk3399: Add support for chromebook_kevin
Jagan Teki
jagan at amarulasolutions.com
Fri Mar 11 21:02:38 CET 2022
On Fri, Dec 24, 2021 at 7:14 PM Alper Nebi Yasak
<alpernebiyasak at gmail.com> wrote:
>
> From: "Marty E. Plummer" <hanetzer at startmail.com>
>
> Add support for Kevin, an RK3399-based convertible chromebook that is
> very similar to Bob. This patch is mostly based on existing support for
> Bob, with only minor changes for Kevin-specific things.
>
> Unlike other Gru boards, coreboot sets Kevin's center logic to 925 mV,
> so adjust it here in the dts as well. The rk3399-gru-kevin devicetree
> has an unknown event code reference which has to be defined, set it
> to the Linux counterpart. The new defconfig is copied from Bob with the
> diffconfig:
>
> DEFAULT_DEVICE_TREE "rk3399-gru-bob" -> "rk3399-gru-kevin"
> DEFAULT_FDT_FILE "rockchip/rk3399-gru-bob.dtb" -> "rockchip/rk3399-gru-kevin.dtb"
> VIDEO_ROCKCHIP_MAX_XRES 1280 -> 2400
> VIDEO_ROCKCHIP_MAX_YRES 800 -> 1600
> +TARGET_CHROMEBOOK_KEVIN y
>
> With this Kevin can boot from SPI flash to a usable U-Boot prompt on the
> display with the keyboard working, but cannot boot into Linux for
> unknown reasons.
>
> eMMC starts in a working state but fails to re-init, microSD card works
> but at a lower-than-expected speed, USB works but causes a hang on
> de-init. There are known workarounds to solve eMMC and USB issues.
>
> Cc: Marty E. Plummer <hanetzer at startmail.com>
> Cc: Simon Glass <sjg at chromium.org>
> [Alper: commit message, resync config with Bob, update MAINTAINERS,
> add to Rockchip doc, add Kconfig help message, set regulator]
> Co-developed-by: Alper Nebi Yasak <alpernebiyasak at gmail.com>
> Signed-off-by: Alper Nebi Yasak <alpernebiyasak at gmail.com>
> Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
> ---
> Marty had signed-off an earlier version of this [1], but not the updated
> version I continued on top of [2]. So I'm not sure if I can add his
> sign-off to this as is, and I hope he can reply to this with a sign-off.
>
> [1] https://patchwork.ozlabs.org/patch/1053386/
> [2] https://patchwork.ozlabs.org/comment/2488899/
>
> Changes in v3:
> - Unset configs MMC_IO_VOLTAGE, MMC_UHS_SUPPORT, MMC_HS400_SUPPORT,
> MMC_HS400_ES_SUPPORT, MMC_SDHCI_SDMA.
> - Add tag: "Reviewed-by: Kever Yang <kever.yang at rock-chips.com>"
>
> Changes in v2:
> - Rebase on u-boot/next, fixing conflict in board_debug_uart_init()
>
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3399-gru-kevin-u-boot.dtsi | 11 ++
> arch/arm/mach-rockchip/rk3399/Kconfig | 11 ++
> arch/arm/mach-rockchip/rk3399/rk3399.c | 3 +-
> arch/arm/mach-rockchip/spl.c | 3 +-
> board/google/gru/Kconfig | 16 +++
> board/google/gru/MAINTAINERS | 8 ++
> board/google/gru/gru.c | 2 +-
> configs/chromebook_kevin_defconfig | 111 ++++++++++++++++++
> doc/board/rockchip/rockchip.rst | 1 +
> include/dt-bindings/input/linux-event-codes.h | 3 +-
> 11 files changed, 166 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm/dts/rk3399-gru-kevin-u-boot.dtsi
> create mode 100644 configs/chromebook_kevin_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 7f622fedbda7..d6883994f21a 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -132,6 +132,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
> rk3399-ficus.dtb \
> rk3399-firefly.dtb \
> rk3399-gru-bob.dtb \
> + rk3399-gru-kevin.dtb \
> rk3399-khadas-edge.dtb \
> rk3399-khadas-edge-captain.dtb \
> rk3399-khadas-edge-v.dtb \
> diff --git a/arch/arm/dts/rk3399-gru-kevin-u-boot.dtsi b/arch/arm/dts/rk3399-gru-kevin-u-boot.dtsi
> new file mode 100644
> index 000000000000..c03bd48e95d7
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-gru-kevin-u-boot.dtsi
> @@ -0,0 +1,11 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Jagan Teki <jagan at amarulasolutions.com>
> + */
> +
> +#include "rk3399-gru-u-boot.dtsi"
> +#include "rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi"
> +
> +&ppvar_centerlogic_pwm {
> + regulator-init-microvolt = <925000>;
> +};
> diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
> index 17628f917127..0833e083d9ef 100644
> --- a/arch/arm/mach-rockchip/rk3399/Kconfig
> +++ b/arch/arm/mach-rockchip/rk3399/Kconfig
> @@ -14,6 +14,17 @@ config TARGET_CHROMEBOOK_BOB
> display. It includes a Chrome OS EC (Cortex-M3) to provide access to
> the keyboard and battery functions.
>
> +config TARGET_CHROMEBOOK_KEVIN
> + bool "Samsung Chromebook Plus (RK3399)"
> + select HAS_ROM
> + select ROCKCHIP_SPI_IMAGE
> + help
> + Kevin is a RK3399-based convertible chromebook. It has two USB 3.0
> + Type-C ports, 4GB of SDRAM, WiFi and a 12.3" 2400x1600 display. It
> + uses its USB ports for both power and external display. It includes
> + a Chromium OS EC (Cortex-M3) to provide access to the keyboard and
> + battery functions.
> +
> config TARGET_EVB_RK3399
> bool "RK3399 evaluation board"
> help
> diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
> index d40969c88898..01a05599cd0d 100644
> --- a/arch/arm/mach-rockchip/rk3399/rk3399.c
> +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
> @@ -140,7 +140,8 @@ void board_debug_uart_init(void)
> struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
>
> if (IS_ENABLED(CONFIG_SPL_BUILD) &&
> - IS_ENABLED(CONFIG_TARGET_CHROMEBOOK_BOB)) {
> + (IS_ENABLED(CONFIG_TARGET_CHROMEBOOK_BOB) ||
> + IS_ENABLED(CONFIG_TARGET_CHROMEBOOK_KEVIN))) {
> rk_setreg(&grf->io_vsel, 1 << 0);
>
> /*
> diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
> index 02c40fb37ed6..7a8db632b80c 100644
> --- a/arch/arm/mach-rockchip/spl.c
> +++ b/arch/arm/mach-rockchip/spl.c
> @@ -56,7 +56,8 @@ u32 spl_boot_device(void)
> defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
> defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
> defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) || \
> - defined(CONFIG_TARGET_CHROMEBOOK_BOB)
> + defined(CONFIG_TARGET_CHROMEBOOK_BOB) || \
> + defined(CONFIG_TARGET_CHROMEBOOK_KEVIN)
> return BOOT_DEVICE_SPI;
> #endif
> if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
> diff --git a/board/google/gru/Kconfig b/board/google/gru/Kconfig
> index 61f7bbca989b..1455e1481dc2 100644
> --- a/board/google/gru/Kconfig
> +++ b/board/google/gru/Kconfig
> @@ -13,3 +13,19 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> def_bool y
>
> endif
> +
> +if TARGET_CHROMEBOOK_KEVIN
> +
> +config SYS_BOARD
> + default "gru"
> +
> +config SYS_VENDOR
> + default "google"
> +
> +config SYS_CONFIG_NAME
> + default "gru"
> +
> +config BOARD_SPECIFIC_OPTIONS # dummy
> + def_bool y
> +
> +endif
> diff --git a/board/google/gru/MAINTAINERS b/board/google/gru/MAINTAINERS
> index e1cda756b8c8..53257c52a04b 100644
> --- a/board/google/gru/MAINTAINERS
> +++ b/board/google/gru/MAINTAINERS
> @@ -4,3 +4,11 @@ S: Maintained
> F: board/google/gru/
> F: include/configs/gru.h
> F: configs/chromebook_bob_defconfig
> +
> +CHROMEBOOK KEVIN BOARD
> +M: Simon Glass <sjg at chromium.org>
> +M: Alper Nebi Yasak <alpernebiyasak at gmail.com>
> +S: Maintained
> +F: board/google/gru/
> +F: include/configs/gru.h
> +F: configs/chromebook_kevin_defconfig
> diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c
> index cbf62a9427c9..fbcf845e87dd 100644
> --- a/board/google/gru/gru.c
> +++ b/board/google/gru/gru.c
> @@ -26,7 +26,7 @@ void gru_dummy_function(int i)
>
> int board_early_init_f(void)
> {
> -# ifdef CONFIG_TARGET_CHROMEBOOK_BOB
> +# if defined(CONFIG_TARGET_CHROMEBOOK_BOB) || defined(CONFIG_TARGET_CHROMEBOOK_KEVIN)
> int sum, i;
>
> /*
> diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig
> new file mode 100644
> index 000000000000..831a6d3822b8
> --- /dev/null
> +++ b/configs/chromebook_kevin_defconfig
> @@ -0,0 +1,111 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_SYS_TEXT_BASE=0x00200000
> +CONFIG_SPL_GPIO=y
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_ENV_OFFSET=0x3F8000
> +CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-kevin"
> +CONFIG_SPL_TEXT_BASE=0xff8c2000
> +CONFIG_ROCKCHIP_RK3399=y
> +CONFIG_ROCKCHIP_BOOT_MODE_REG=0
> +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
> +# CONFIG_SPL_MMC is not set
> +CONFIG_TARGET_CHROMEBOOK_KEVIN=y
> +CONFIG_DEBUG_UART_BASE=0xff1a0000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
> +CONFIG_DEBUG_UART=y
> +CONFIG_SYS_LOAD_ADDR=0x800800
> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_BOARD_EARLY_INIT_R=y
> +CONFIG_MISC_INIT_R=y
> +CONFIG_BLOBLIST=y
> +CONFIG_BLOBLIST_SIZE=0x1000
> +CONFIG_BLOBLIST_ADDR=0x100000
> +CONFIG_HANDOFF=y
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
> +CONFIG_CMD_BOOTZ=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_SF_TEST=y
> +CONFIG_CMD_SPI=y
> +CONFIG_CMD_USB=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_TIME=y
> +CONFIG_CMD_PMIC=y
> +CONFIG_CMD_REGULATOR=y
> +CONFIG_CMD_LOG=y
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_ROCKCHIP_GPIO=y
> +CONFIG_I2C_CROS_EC_TUNNEL=y
> +CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_I2C_MUX=y
> +CONFIG_CROS_EC_KEYB=y
> +CONFIG_MISC=y
> +CONFIG_ROCKCHIP_EFUSE=y
> +CONFIG_CROS_EC=y
> +CONFIG_CROS_EC_SPI=y
> +CONFIG_PWRSEQ=y
> +CONFIG_MMC_PWRSEQ=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_SF_DEFAULT_BUS=1
> +CONFIG_SF_DEFAULT_SPEED=20000000
> +CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_DM_ETH=y
> +CONFIG_ETH_DESIGNWARE=y
> +CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_PHY_ROCKCHIP_TYPEC=y
> +CONFIG_PMIC_RK8XX=y
> +CONFIG_REGULATOR_PWM=y
> +CONFIG_DM_REGULATOR_GPIO=y
> +CONFIG_REGULATOR_RK8XX=y
> +CONFIG_PWM_CROS_EC=y
> +CONFIG_PWM_ROCKCHIP=y
> +CONFIG_DM_RESET=y
> +CONFIG_DM_RNG=y
> +CONFIG_RNG_ROCKCHIP=y
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_ROCKCHIP_SPI=y
> +CONFIG_SYSRESET=y
> +CONFIG_USB=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_XHCI_DWC3=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_OHCI_HCD=y
> +CONFIG_USB_OHCI_GENERIC=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_KEYBOARD=y
> +CONFIG_USB_HOST_ETHER=y
> +CONFIG_USB_ETHER_ASIX=y
> +CONFIG_USB_ETHER_ASIX88179=y
> +CONFIG_USB_ETHER_MCS7830=y
> +CONFIG_USB_ETHER_RTL8152=y
> +CONFIG_USB_ETHER_SMSC95XX=y
> +CONFIG_DM_VIDEO=y
> +CONFIG_DISPLAY=y
> +CONFIG_VIDEO_ROCKCHIP=y
> +CONFIG_VIDEO_ROCKCHIP_MAX_XRES=2400
> +CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1600
> +CONFIG_DISPLAY_ROCKCHIP_EDP=y
> +CONFIG_CMD_DHRYSTONE=y
> +CONFIG_ERRNO_STR=y
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index 144cb98ef941..a75e60b9fa30 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -66,6 +66,7 @@ List of mainline supported Rockchip boards:
> - FriendlyElec NanoPi M4B (nanopi-m4b-rk3399)
> - FriendlyARM NanoPi NEO4 (nanopi-neo4-rk3399)
> - Google Bob (chromebook_bob)
> + - Google Kevin (chromebook_kevin)
> - Khadas Edge (khadas-edge-rk3399)
> - Khadas Edge-Captain (khadas-edge-captain-rk3399)
> - Khadas Edge-V (hadas-edge-v-rk3399)
> diff --git a/include/dt-bindings/input/linux-event-codes.h b/include/dt-bindings/input/linux-event-codes.h
> index 87cf351bab03..331458c0e710 100644
> --- a/include/dt-bindings/input/linux-event-codes.h
> +++ b/include/dt-bindings/input/linux-event-codes.h
> @@ -749,7 +749,8 @@
> #define SW_ROTATE_LOCK 0x0c /* set = rotate locked/disabled */
> #define SW_LINEIN_INSERT 0x0d /* set = inserted */
> #define SW_MUTE_DEVICE 0x0e /* set = device disabled */
> -#define SW_MAX 0x0f
> +#define SW_PEN_INSERTED 0x0f /* set = pen inserted */
> +#define SW_MAX 0x10
This change is not related to the actual patch - remove it from here.
Jagan.
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