[PATCH] arm64: zynqmp: Fix i2c addresses for zynqmp-p-a2197

Michal Simek monstr at monstr.eu
Mon Mar 14 15:24:15 CET 2022


po 7. 3. 2022 v 8:53 odesílatel Michal Simek <michal.simek at xilinx.com> napsal:
>
> After double checking some i2c addresses are not correct. It is visible
> from i2c dump
>
> ZynqMP> i2c bus
> Bus 3:  i2c at ff020000
>    74: i2c-mux at 74, offset len 1, flags 0
> Bus 5:  i2c at ff020000->i2c-mux at 74->i2c at 0
> Bus 6:  i2c at ff020000->i2c-mux at 74->i2c at 2
> Bus 7:  i2c at ff020000->i2c-mux at 74->i2c at 1
> Bus 8:  i2c at ff020000->i2c-mux at 74->i2c at 3
> Bus 4:  i2c at ff030000  (active 4)
>    74: i2c-mux at 74, offset len 1, flags 0
> Bus 9:  i2c at ff030000->i2c-mux at 74->i2c at 0
> Bus 10: i2c at ff030000->i2c-mux at 74->i2c at 3
> Bus 11: i2c at ff030000->i2c-mux at 74->i2c at 4
> Bus 12: i2c at ff030000->i2c-mux at 74->i2c at 5  (active 12)
>    51: generic_51, offset len 1, flags 0
>    60: generic_60, offset len 1, flags 0
>    74: generic_74, offset len 1, flags 0
> Bus 13: i2c at ff030000->i2c-mux at 74->i2c at 6  (active 13)
>    51: generic_51, offset len 1, flags 0
>    5d: generic_5d, offset len 1, flags 0
>    74: generic_74, offset len 1, flags 0
> ZynqMP> i2c dev 4
> Setting bus to 4
> ZynqMP> i2c mw 74 0 18
> ZynqMP> i2c probe
> Valid chip addresses: 18 36 37 50 51 60 74
> ZynqMP> i2c mw 74 0 20
> ZynqMP> i2c probe
> Valid chip addresses: 51 60 74
>
> where it is clear that si570 (u5) is at 0x60 address and 8t49n240 (u39) is
> also at address 0x60 based on log above.
> i2c address 0x74 is i2c mux and 0x51 is eeprom.
>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
>
>  arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
> index 5d21795de9d0..b3fe42faeee8 100644
> --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
> +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
> @@ -511,10 +511,10 @@
>                         #address-cells = <1>;
>                         #size-cells = <0>;
>                         reg = <6>;
> -                       si570_hsdp: clock-generator at 5d { /* u5 */
> +                       si570_hsdp: clock-generator at 60 { /* u5 */
>                                 #clock-cells = <0>;
>                                 compatible = "silabs,si570";
> -                               reg = <0x5d>;   /* 570JAC000900DG */
> +                               reg = <0x60>;   /* 570JAC000900DG */
>                                 temperature-stability = <50>;
>                                 factory-fout = <156250000>;
>                                 clock-frequency = <156250000>;
> @@ -528,10 +528,10 @@
>                         /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
>                         /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */
>                         /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
> -                       clock_8t49n287: clock-generator at d8 { /* u39 8T49N240 - pcie clocking 3 */
> +                       clock_8t49n287: clock-generator at 60 { /* u39 8T49N240 - pcie clocking 3 */
>                                 #clock-cells = <1>; /* author David Cater <david.cater at idt.com>*/
>                                 compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */
> -                               reg = <0xd8>;
> +                               reg = <0x60>;
>                                 /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */
>                                 /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */
>
> --
> 2.35.1
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs


More information about the U-Boot mailing list