arm: stm32h7: Support for the STM32H747I-DISCO board

[Alexandre TORGUE]

Hi Johannes

On 3/7/22 20:14, Johannes (krjdev) Krottmayer wrote:
> Hi Patrice
> 
> On 07.03.22 18:38, Patrice CHOTARD wrote:
>> Hi Johannes
>>
>> +Alexandre who is STM32 kernel maintainer.
> 
> Okay, no problem. :)
> 
>> On 3/7/22 18:24, Johannes (krjdev) Krottmayer wrote:
>>> Hi Patrice
>>>
>>> Thanks for the answer.
>>>
>>> On 07.03.22 17:09, Patrice CHOTARD wrote:
>>>>> But there some issues on the website:
>>>>> - According the website, the board has 256Mbit external SDRAM
>>>>>
>>>>> That's not true. There is a 512MBit SDRAM from ISSI mounted.
>>>
>>> It's a 256Mbit SDRAM mounted on the board. First looked in the
>>> schematics in the user manual and there are two SDRAM types
>>> (256MBit and 512Bit from ISSI). But unfortunately no notice
>>> which type is really mounted.
>>>
>>> Sorry, my mistake.
>>>
>>>>> Can I release a patch series here, when my work is done? I don't
>>>>> know if there any interest for other users exists, to add here
>>>>> the support to U-Boot.
>>>>
>>>> Yes please, it's still useful to get a new STM32 board supported in U-Boot ;-)
>>>
>>> Device-Trees:
>>> I would release SoC device-trees for other types in this series too.
>>> Made a base SoC (dtsi) for the STM32H745. The STM32H747 includes this
>>> device-tree as base configuration, because according the TRM, the
>>> STM32H747 has an additional feature, the DSI interface.
>>>
>>> Other SoC series:
>>> - STM32H755:
>>> STM32H755 source also STM32H745, because the additional features is
>>> the HASH and the CRYPTO controller.
>>>
>>> - STM32H757:
>>> STM32H757 source also STM32H747 because the SoC has also the DSI
>>> interface and the HASH and the CRYPTO controller.
>>>
>>> So I would create following SoC device-trees:
>>> stm32h745.dtsi -> This is the base device-tree
>>> stm22h747.dtsi
>>> stm22h755.dtsi
>>> stm32h757.dtsi
>>>
>>> Of course also for STM32H747I-DISCO. :)

If you only introduce stm32h747 disco board I think it is better to stop 
at STM32H747. If there are no boards including STM32H755 / H757 no need 
to add them.

>>>
>>> Okay?
>>
>> I am okay with your approach.
>>
>> By default, we synchronized U-boot device tree with kernel device tree.
>> First it will be preferable to do the job on kernel side.
>> As soon as it will be accepted, then we will synchronize the device tree on U-Boot side.
> 
> Okay.
> 
>> Alex, are you agree with this ?
> 
> Hi Alexandre
> 
> About the device-trees. I would add all peripherals from these SoC's
> in the device-tree.
> 
> Here I have a question:
> The SoC's includes the Chrom-ART Accelerator (DMA2D) for hardware
> accelerated 2D graphic. I have searched both in U-Boot and Linux in
> the source tree, but didn't find any support >
> Would create a new device-tree device (st,stm32-dma2d) for this
> graphic controller. Maybe I could add driver support to both U-Boot
> and Linux.

Have a look on my pull request for v5.18. DMA2D support has been added 
in stm32f469 disco board.

> 
> The SoC series includes a Cortex-M7 and a Cortex-M4. Currently I have
> the following CPU node in the device tree:

You declare M4 + M7 as a cluster ? Linux runs on both ? I thought that 
M4 was more a coprocessor in this case.

> 
> ---
> 	cpus {
> 		#address-cells = <1>;
> 		#size-cells = <0>;
> 
> 		cpu-map {
> 			cluster0 {
> 				core0 {
> 					cpu = &cpu0;
> 				};
> 			};
> 
> 			cluster1 {
> 				core0 {
> 					cpu = &cpu1;
> 				};
> 			};
> 		};
> 
> 		cpu0: cpu at 0 {
> 			device_type = "cpu";
> 			compatible = "arm,cortex-m7";
> 			reg = <0>;
> 			operating-points-v2 = <&cpu0_opp_table>;
> 		};
> 
> 		cpu1: cpu at 100 {
> 			device_type = "cpu";
> 			compatible = "arm,cortex-m4";
> 			reg = <100>;
> 			operating-points-v2 = <&cpu1_opp_table>;
> 		};
> 
> 		/*
> 		 * Operating characteristics Cortex-M7
> 		 *
> 		 * - LDO regulator ON
> 		 * - Run mode (Data and code processing)
> 		 * - Only Cortex-M7 ON
> 		 * - All peripherals OFF
> 		 *
> 		 * Please see datasheet for details
> 		 *
> 		 */
> 		cpu0_opp_table: opp_table0 {
> 			compatible = "operating-points-v2";
> 
> 			opp-vos3 {
> 				opp-hz = /bits/ 64 <200000000>;
> 				opp-microvolt = <1000000>;
> 				opp-microamp = <34500>;
> 			};
> 
> 			opp-vos2 {
> 				opp-hz = /bits/ 64 <300000000>;
> 				opp-microvolt = <1100000>;
> 				opp-microamp = <55000>;
> 			};
> 
> 			opp-vos1 {
> 				opp-hz = /bits/ 64 <400000000>;
> 				opp-microvolt = <1200000>;
> 				opp-microamp = <80000>;
> 			};
> 
> 			opp-vos0 {
> 				opp-hz = /bits/ 64 <480000000>;
> 				opp-microvolt = <1350000>;
> 				opp-microamp = <110000>;
> 				turbo-mode;
> 			};
> 		};
> 
> 		/*
> 		 * Operating characteristics Cortex-M4
> 		 *
> 		 * - LDO regulator ON
> 		 * - Run mode (Data and code processing)
> 		 * - Only Cortex-M4 ON
> 		 * - ART accelerator ON
> 		 * - All peripherals OFF
> 		 *
> 		 * Please see datasheet for details
> 		 *
> 		 */
> 		cpu1_opp_table: opp_table1 {
> 			compatible = "operating-points-v2";
> 
> 			opp-vos3 {
> 				opp-hz = /bits/ 64 <100000000>;
> 				opp-microvolt = <1000000>;
> 				opp-microamp = <35000>;
> 			};
> 
> 			opp-vos2 {
> 				opp-hz = /bits/ 64 <150000000>;
> 				opp-microvolt = <1100000>;
> 				opp-microamp = <56000>;
> 			};
> 
> 			opp-vos1 {
> 				opp-hz = /bits/ 64 <200000000>;
> 				opp-microvolt = <1200000>;
> 				opp-microamp = <79000>;
> 			};
> 
> 			opp-vos0 {
> 				opp-hz = /bits/ 64 <240000000>;
> 				opp-microvolt = <1350000>;
> 				opp-microamp = <121000>;
> 				turbo-mode;
> 			};
> 		};
> 	};
> ---
> 
> Okay?
> 
> Kind regards,
> 
> Johannes K.