[PATCH v4 2/4] clk: imx8mq: Add a clock driver for the imx8mq

Heiko Thiery heiko.thiery at gmail.com
Wed Mar 16 16:55:33 CET 2022


Hi Angus,

[snip]
> > > But then something went wrong when probing uart3 ... the baudrate
> > > switched for the uart2 (console) and the serial output became broken.
> > > Later when the kernel starts the output becomes correct again. So the
> > > kernel seems to configure it correctly.
> > >
> > > see here: https://pastebin.com/raw/qXVShb3Q
> > >
> > > When I remove the "assigned-clock-parents = <&clk
> > > IMX8MQ_SYS1_PLL_80M>;" for uart3 the output of uart2 (console) keeps
> > > ok.
> >
> > If that "fixes" it then it means that the parent IMX8MQ_SYS1_PLL_80M
> > clock rate is getting changed by the uart3 stanza.
> >
> > Are you using the mainline devicetree file for your board ? If not could
> > you provide a link ?
>
> I use the mainline u-boot/linux one.

We (thanks to Michael) found the issue. For the imx8mq the
imx_get_uartclk() returns always the values for UART1_CLK_ROOT [1].
This is wrong. Here we have to get the value dependent on the used
UART.

[1] https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-imx/imx8m/clock_imx8mq.c#L381

-- 
Heiko


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